JPS5760424A - Data transfer controller - Google Patents

Data transfer controller

Info

Publication number
JPS5760424A
JPS5760424A JP13626480A JP13626480A JPS5760424A JP S5760424 A JPS5760424 A JP S5760424A JP 13626480 A JP13626480 A JP 13626480A JP 13626480 A JP13626480 A JP 13626480A JP S5760424 A JPS5760424 A JP S5760424A
Authority
JP
Japan
Prior art keywords
speed bus
data transfer
coupled
control means
access control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13626480A
Other languages
Japanese (ja)
Inventor
Toshio Awaji
Chiaki Hishinuma
Shuji Miki
Shoji Kajizuka
Tomihide Seo
Hiroshi Dewa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Original Assignee
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Hitachi Ltd, NEC Corp, Nippon Telegraph and Telephone Corp, Oki Electric Industry Co Ltd, Nippon Electric Co Ltd filed Critical Fujitsu Ltd
Priority to JP13626480A priority Critical patent/JPS5760424A/en
Publication of JPS5760424A publication Critical patent/JPS5760424A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Bus Control (AREA)

Abstract

PURPOSE:To increase a data transfer speed, by operating both buses in parallel, when controlling a data transfer of a processor group coupled with a high-speed bus, and a processor group coupled with a low speed bus. CONSTITUTION:Processors CP1-CPn are coupled with a high speed bus IPBH, processors NP1-NPn are coupled with a low-speed bus IPBL, and both the buses are coupled with a data transfer controller IPC, and are divided into two systems by the device IPC. The device IPC is provided with a high-speed bus access control means and a low-speed bus access control means, and when data is transferred between CPi (i=1-n) and NPk (k=1-n), both the bus access control means are operated in parallel. In this way, the transfer time is shortened.
JP13626480A 1980-09-30 1980-09-30 Data transfer controller Pending JPS5760424A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13626480A JPS5760424A (en) 1980-09-30 1980-09-30 Data transfer controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13626480A JPS5760424A (en) 1980-09-30 1980-09-30 Data transfer controller

Publications (1)

Publication Number Publication Date
JPS5760424A true JPS5760424A (en) 1982-04-12

Family

ID=15171116

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13626480A Pending JPS5760424A (en) 1980-09-30 1980-09-30 Data transfer controller

Country Status (1)

Country Link
JP (1) JPS5760424A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6389958A (en) * 1986-09-19 1988-04-20 インターナショナル・ビジネス・マシーンズ・コーポレーション Input/output interface bus apparatus
JPH11184801A (en) * 1997-12-22 1999-07-09 Konica Corp Interface device and data processing system
JPH11184800A (en) * 1997-12-22 1999-07-09 Konica Corp Data processor and system constitution method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6389958A (en) * 1986-09-19 1988-04-20 インターナショナル・ビジネス・マシーンズ・コーポレーション Input/output interface bus apparatus
JPH11184801A (en) * 1997-12-22 1999-07-09 Konica Corp Interface device and data processing system
JPH11184800A (en) * 1997-12-22 1999-07-09 Konica Corp Data processor and system constitution method

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