JPS5758404A - Amplifying circuit - Google Patents

Amplifying circuit

Info

Publication number
JPS5758404A
JPS5758404A JP13359380A JP13359380A JPS5758404A JP S5758404 A JPS5758404 A JP S5758404A JP 13359380 A JP13359380 A JP 13359380A JP 13359380 A JP13359380 A JP 13359380A JP S5758404 A JPS5758404 A JP S5758404A
Authority
JP
Japan
Prior art keywords
load
amplifying stage
input
voltage amplifying
inversely proportional
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13359380A
Other languages
Japanese (ja)
Inventor
Satoru Ishii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pioneer Corp
Original Assignee
Pioneer Corp
Pioneer Electronic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pioneer Corp, Pioneer Electronic Corp filed Critical Pioneer Corp
Priority to JP13359380A priority Critical patent/JPS5758404A/en
Publication of JPS5758404A publication Critical patent/JPS5758404A/en
Pending legal-status Critical Current

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  • Amplifiers (AREA)

Abstract

PURPOSE: To achieve stable amplification, by providing a phase compensating capacitive element between the input of the 1st voltage amplifying stage and th output of a voltage amplifying stage so that the pole frequency is inversely proportional to a load resistor.
CONSTITUTION: A phase compensating capacitor C is provided between the base input of a transistor Q5 being the input of the 1st voltage amplifying stage 2 and a circuit output vo. In case of no negative feedback, an opened loop gain at low region is gm1.Ro.hfe.gm2.RL and it is porportional to the load RL. On the other hand, the opened loop taking into consideration of high frequencies is expressed in equation (4). That is, the 1st pole frequency is 1/2πsCRL(1+gm1Rohfe) which is inversely proportional to the load RL. Thus, the characteristic with -6dB/OCT inclination are coincident independently of the value of the load RL, and a given band width can be obtained independently of the load with a closed loop gain of 1/β through feedback.
COPYRIGHT: (C)1982,JPO&Japio
JP13359380A 1980-09-25 1980-09-25 Amplifying circuit Pending JPS5758404A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13359380A JPS5758404A (en) 1980-09-25 1980-09-25 Amplifying circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13359380A JPS5758404A (en) 1980-09-25 1980-09-25 Amplifying circuit

Publications (1)

Publication Number Publication Date
JPS5758404A true JPS5758404A (en) 1982-04-08

Family

ID=15108430

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13359380A Pending JPS5758404A (en) 1980-09-25 1980-09-25 Amplifying circuit

Country Status (1)

Country Link
JP (1) JPS5758404A (en)

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