JPS5752248A - Data separating circuit - Google Patents
Data separating circuitInfo
- Publication number
- JPS5752248A JPS5752248A JP12631680A JP12631680A JPS5752248A JP S5752248 A JPS5752248 A JP S5752248A JP 12631680 A JP12631680 A JP 12631680A JP 12631680 A JP12631680 A JP 12631680A JP S5752248 A JPS5752248 A JP S5752248A
- Authority
- JP
- Japan
- Prior art keywords
- error
- data
- circuit
- plural
- ffs
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
Abstract
PURPOSE:To execute a stable data separation which is low in an error rate of a data, by discriminating a digital data having an error detecting code by plural discrimination levels, detecting an error in accordance with the error detecting code, and contrasting the error rate. CONSTITUTION:A pseudo television signal from a VTR is amplified at 1, is DC- reproduced by a clamping circuit 2, is led to plural comparators 3a-3c, and is discriminated by plural discrimination levels. As for a discriminated data, its error is detected by error detecting circuits 11a-11c, and whenever the error is detected, a detection pulse is provided to ternary counters 13a-13c. When the counters 13a-13c have counted a data error three times, they provide the outputs to monostable multivibrators 14a-14c and an AND circuit 16, and obtain information corresponding to an error rate. Output pulses from the monostable multivibrators are inputted to FFs 15a-15c, respectively, when an output has been provided from the circuit 16, switches 6a-6c are driven selectively by outputs of the FFs, and a separated data from the comparators 3a-3c is sent to a PCM demodulator 7.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12631680A JPS5752248A (en) | 1980-09-11 | 1980-09-11 | Data separating circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12631680A JPS5752248A (en) | 1980-09-11 | 1980-09-11 | Data separating circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5752248A true JPS5752248A (en) | 1982-03-27 |
Family
ID=14932163
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12631680A Pending JPS5752248A (en) | 1980-09-11 | 1980-09-11 | Data separating circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5752248A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61150968A (en) * | 1984-12-25 | 1986-07-09 | Murata Mach Ltd | Yarn end treating device |
JPS63100811A (en) * | 1986-10-16 | 1988-05-02 | Nec Corp | Interface circuit |
-
1980
- 1980-09-11 JP JP12631680A patent/JPS5752248A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61150968A (en) * | 1984-12-25 | 1986-07-09 | Murata Mach Ltd | Yarn end treating device |
JPH0138750B2 (en) * | 1984-12-25 | 1989-08-16 | Murata Machinery Ltd | |
JPS63100811A (en) * | 1986-10-16 | 1988-05-02 | Nec Corp | Interface circuit |
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