JPS5750426A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5750426A
JPS5750426A JP55126520A JP12652080A JPS5750426A JP S5750426 A JPS5750426 A JP S5750426A JP 55126520 A JP55126520 A JP 55126520A JP 12652080 A JP12652080 A JP 12652080A JP S5750426 A JPS5750426 A JP S5750426A
Authority
JP
Japan
Prior art keywords
oxygen
defects
regions
concentration
element section
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55126520A
Other languages
Japanese (ja)
Inventor
Toshimoto Kodaira
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP55126520A priority Critical patent/JPS5750426A/en
Publication of JPS5750426A publication Critical patent/JPS5750426A/en
Pending legal-status Critical Current

Links

Classifications

    • H10P36/03

Landscapes

  • Recrystallisation Techniques (AREA)

Abstract

PURPOSE:To prevent crystalline defects from exerting adverse effect on a semiconductor element by generating a non-defective crystal region only to a region constituting the semiconductor element in the substrate of a semiconductor and mounting a means generating a large number of crystalline defects to other regions. CONSTITUTION:The means is mounted which generates crystalline defects in the base except the semiconductor element section of a surface layer of the semiconductor signal crystal base more than the number of the defects of the element section by making the concentration of oxygen in the element section lower than the concentration except the element section. For example, an oxide film 2 is formed on the surface of the silicon substrate 1, the oxide films on regions in which the elements are shaped are removed and silicon surfaces are exposed. The whole is thermally treated in an inert gas and the regions 3, 4 with the low concentration of oxygen are formed, and the whole is thermally treated in oxygen. Accordingly, a large number of the minute defects are generated in the region 1 in which the concentration of oxygen does not lower, and the defects are decreased in the regions 3, 4 with the low concentration of oxygen.
JP55126520A 1980-09-11 1980-09-11 Semiconductor device Pending JPS5750426A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55126520A JPS5750426A (en) 1980-09-11 1980-09-11 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55126520A JPS5750426A (en) 1980-09-11 1980-09-11 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5750426A true JPS5750426A (en) 1982-03-24

Family

ID=14937234

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55126520A Pending JPS5750426A (en) 1980-09-11 1980-09-11 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5750426A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5434755A (en) * 1977-08-24 1979-03-14 Hitachi Ltd Manufacture of semiconductor device
JPS5596641A (en) * 1979-01-19 1980-07-23 Chiyou Lsi Gijutsu Kenkyu Kumiai Method of fabricating silicon monocrystal wafer

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5434755A (en) * 1977-08-24 1979-03-14 Hitachi Ltd Manufacture of semiconductor device
JPS5596641A (en) * 1979-01-19 1980-07-23 Chiyou Lsi Gijutsu Kenkyu Kumiai Method of fabricating silicon monocrystal wafer

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