JPS5739450A - Data processing system using microcomputer - Google Patents

Abstract

PURPOSE:To execute an operation of a negative instruction by a microcomputer whose deciding instruction in the instruction has only an affirmative instruction and has no negative instruction, by forming a pair by an input/output data and a data of which all bit logic has been reversed, and storing it temporarily. CONSTITUTION:In an RAM2 of a 4 bit micro-CPU1, a byte F11 by which logic ''1'' is stored when inputs A-D are logic ''1'' is stored in an address 3, and a byte F10 by which logic ''0'' is stored when inputs A-D are logic ''1'' is stored in an address 4. In case a job JA is executed at the time of Anot equal to 1 in a step S1 by a program, an a job JB is executed at the time of B=1 in other step S2, the byte F10 of the address 4 of the RAM2 is accessed, and an affirmative instruction which coincides with its contents or not is executed. In this way, a negative instruction is executed substantially. In the step S2, the byte 11 of the address 3 is accessed, and the affirmative instruction is executed.