JPS5738089A - Color signal level correction circuit - Google Patents
Color signal level correction circuitInfo
- Publication number
- JPS5738089A JPS5738089A JP11421580A JP11421580A JPS5738089A JP S5738089 A JPS5738089 A JP S5738089A JP 11421580 A JP11421580 A JP 11421580A JP 11421580 A JP11421580 A JP 11421580A JP S5738089 A JPS5738089 A JP S5738089A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- signal
- circuits
- output
- playback
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N9/00—Details of colour television systems
- H04N9/79—Processing of colour television signals in connection with recording
- H04N9/793—Processing of colour television signals in connection with recording for controlling the level of the chrominance signal, e.g. by means of automatic chroma control circuits
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
Abstract
PURPOSE:To make further stable the playback color signal level, by obtaining a correction signal of rectangular wave through the use of a horizontal synchronizing signal separated from a playback video signal and inputting it to a chroma signal amplitude control circuit. CONSTITUTION:A playback video signal from an input terminal is inputted to a synchronizing separation circuit 12. The separated horizontal synchronizing signal is inputted to an FF circuit 14 via an equalizing pulse elimination circuit 13. A noninversion output of the FF circuit 14 is used as switching control signal for switches SW1, SW2. The output of the FF circuit 14 is applied to an NAND circuit 15 and the output of the NAND circuits 15, 16 is applied to burst gate circuits 21, 22 as a gate signal via delay circuits 17, 18. On the other hand, a playback color signal is applied to an input terminal of the switch circuit SW1 via an automatic color amplitude control circuit 19. A burst signal picked up at the burst gate circuits 21, 22 is in peak detection at peak detection circuits 23, 24 and applied to a control terminal of the circuit 19 via the switch circuit SW2.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11421580A JPS5738089A (en) | 1980-08-20 | 1980-08-20 | Color signal level correction circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11421580A JPS5738089A (en) | 1980-08-20 | 1980-08-20 | Color signal level correction circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5738089A true JPS5738089A (en) | 1982-03-02 |
Family
ID=14632092
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11421580A Pending JPS5738089A (en) | 1980-08-20 | 1980-08-20 | Color signal level correction circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5738089A (en) |
-
1980
- 1980-08-20 JP JP11421580A patent/JPS5738089A/en active Pending
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