JPS5736429A - Deskew buffer device - Google Patents

Deskew buffer device

Info

Publication number
JPS5736429A
JPS5736429A JP10907080A JP10907080A JPS5736429A JP S5736429 A JPS5736429 A JP S5736429A JP 10907080 A JP10907080 A JP 10907080A JP 10907080 A JP10907080 A JP 10907080A JP S5736429 A JPS5736429 A JP S5736429A
Authority
JP
Japan
Prior art keywords
circuit
data
fifo
buffer device
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10907080A
Other languages
Japanese (ja)
Other versions
JPS6353629B2 (en
Inventor
Seiichi Yamaguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP10907080A priority Critical patent/JPS5736429A/en
Publication of JPS5736429A publication Critical patent/JPS5736429A/en
Publication of JPS6353629B2 publication Critical patent/JPS6353629B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/20—Signal processing not specific to the method of recording or reproducing; Circuits therefor for correction of skew for multitrack recording

Abstract

PURPOSE:To realize a stable operation of a deskew buffer device with a small number of elements, by securing no data state until the next resynchronous mark is detected with a pseudo clock in the dead track set mode. CONSTITUTION:A synchronism is secured for a clocl CLK1 through a flip-flop circuit 9, and the load clock is delivered to a first-in/first-out (FIFO) circuit 3 through an AND circuit 10. In addition to the data signal and the pointer signal, a mark detection signal is supplied in accordance with the first data position and in the form of an input that is made to pass through the FIFO device 3. When a dead track is set, data is sent out by a pseudo clock CLK4 through an AND circuit 13 and a multiplexer circuit 4 to prepare for the next resynchronism in case the data exists in the FIFO device 3.
JP10907080A 1980-08-08 1980-08-08 Deskew buffer device Granted JPS5736429A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10907080A JPS5736429A (en) 1980-08-08 1980-08-08 Deskew buffer device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10907080A JPS5736429A (en) 1980-08-08 1980-08-08 Deskew buffer device

Publications (2)

Publication Number Publication Date
JPS5736429A true JPS5736429A (en) 1982-02-27
JPS6353629B2 JPS6353629B2 (en) 1988-10-25

Family

ID=14500829

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10907080A Granted JPS5736429A (en) 1980-08-08 1980-08-08 Deskew buffer device

Country Status (1)

Country Link
JP (1) JPS5736429A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6362026A (en) * 1986-09-03 1988-03-18 Nec Corp Control system for transfer of data

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0586431U (en) * 1991-07-19 1993-11-22 林時計工業株式会社 Parts mounting device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6362026A (en) * 1986-09-03 1988-03-18 Nec Corp Control system for transfer of data
JPH0564369B2 (en) * 1986-09-03 1993-09-14 Nippon Electric Co

Also Published As

Publication number Publication date
JPS6353629B2 (en) 1988-10-25

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