JPH0564369B2 - - Google Patents

Description

TECHNICAL FIELD The present invention relates to a data transfer control circuit, and more particularly to a data transfer control circuit for a non-impact printer such as an electrophotographic printer that transfers image data from a memory to a mechanical control section at high speed.

Prior Art Conventionally, in this type of printer, mechanically, 1
Page data is read from the image memory at the same cycle for each dot line, but high-speed printers require a temporary storage circuit to store data for one dot line in the image data transfer section.
This storage circuit was composed of a random access memory and an address control circuit.

Such conventional high-speed printers required a temporary storage circuit consisting of a random access memory and an address control circuit, so the area around the image memory was complicated for write/read switching control and address control. The drawback was that it required a huge amount of circuitry.

Purpose of the Invention The present invention has been made to eliminate the drawbacks of the conventional ones as described above, and provides a data transfer control that allows high-speed printer data transfer without requiring a large amount of complicated circuitry. The purpose is to provide circuits.

Structure of the Invention A data transfer control circuit according to the present invention is a data transfer control circuit for a non-impact printer having a memory circuit for storing digital data, and temporarily stores one dot line of each of the digital data stored in the memory circuit. a plurality of first-in-first-out memories, and when the digital data temporarily stored in one of the first-in-first-out memories is read one byte at a time and transferred, the digital data next to the read digital data is transferred. The present invention is characterized by comprising means for controlling the data to be temporarily stored one byte at a time in the other first-in-first-out memory.

Embodiment Next, an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention. In the figure, one embodiment of the present invention includes a memory circuit 1 that stores image data, a first-in-first-out memory (hereinafter referred to as FiFo) 2 that temporarily stores image data from the memory circuit 1,
3 and a control circuit 4.

FIG. 2 is a timing chart of one embodiment of the present invention. The operation of an embodiment of the present invention will be explained using FIG. 1 and FIG. 2.

The storage circuit 1 stores one dot of output image data in correspondence with one bit of the memory. When a 1-dot line output request signal B and a 1-byte output request signal C for the first dot line from a mechanical control section (not shown) are input to the control section 4, the control section 4
An image data request signal b is output from the memory circuit 1, and in synchronization with this, the data of the second dot line is output byte by byte from the memory circuit 1, and the data of this second dot line is stored in the FiFo 3 by the write signal d.

The data of the first dot line, which has been previously read out from the storage circuit 1 by the control circuit 4 and stored in the FiFo 2 at the same time, is output as the image data output A in response to the readout signal f.

When the 1-dot line output request signal B and the 1-byte output request signal C of the second dot line are input to the control unit 4, and the image data request signal b is output from the control unit 4, the data of the third dot line is transferred to the write signal c. Each byte is stored in FiFo2 by
At the same time, the data of the second dot line stored in the FiFo 3 at the time of the previous output request is outputted as image data output A byte by byte in response to the readout signal e. Similarly, while writing to FiFo2, FiFo
By repeating these operations, one page of raster skin data is output.

In this way, by providing a plurality of FiFos 2 and 3 in the image data output section of a printer device (not shown) and controlling so that when image data is read from one FiFo 2, the next image data is written to the other FiFo 3, , enables high-speed printer image data reading. Further, compared to the conventional example, complicated address control for storing one line of data is not required, so it can be realized at low cost.

Effects of the Invention As explained above, according to the present invention, a plurality of FiFos are provided to temporarily store data from memory, and when data is read and transferred from one FiFo, the next data is transferred to another FiFo. By writing the data, there is an effect that high-speed printer data transfer can be performed without requiring a complicated and enormous amount of circuitry.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention;
FIG. 2 is a timing chart of one embodiment of the present invention. Explanation of symbols of main parts, 1...Memory circuit, 2,
3...First-in-first-out memory (FiFo), 4...Control circuit.

Claims (1)

[Claims] 1. A data transfer control circuit for a non-impact printer having a memory circuit for storing digital data, comprising a plurality of first-in-first-out memories each temporarily storing one dot line of the digital data stored in the memory circuit; When the digital data temporarily stored in one of the first-in-first-out memories is read one byte at a time and transferred, the digital data next to the read digital data is transferred to the other first-in-first-out memory. 1. A data transfer control circuit comprising: means for temporarily storing one byte at a time in a data transfer control circuit.