JPS5733475A - Multiple virtual storage system - Google Patents

Multiple virtual storage system

Info

Publication number
JPS5733475A
JPS5733475A JP10554780A JP10554780A JPS5733475A JP S5733475 A JPS5733475 A JP S5733475A JP 10554780 A JP10554780 A JP 10554780A JP 10554780 A JP10554780 A JP 10554780A JP S5733475 A JPS5733475 A JP S5733475A
Authority
JP
Japan
Prior art keywords
program
region
eps
storage device
job program
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10554780A
Other languages
Japanese (ja)
Inventor
Kiyoshi Inoue
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP10554780A priority Critical patent/JPS5733475A/en
Publication of JPS5733475A publication Critical patent/JPS5733475A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/445—Program loading or initiating

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

PURPOSE:To perform the loading of a job program to a real memory and the shunt from a main memory in a high speed, by writing the data on an escape page storage device with no intervention of an input/output device. CONSTITUTION:A main storage device MS forming a system consists of a monitor program region and a user program region. An escape page storage device EPS is formed with a magnetic bubble memory for instance. At the same time, the instructions of ENTRY, PURGE, BACKUP and RESTORE are added, and the job program of the device MS is shifted to the device EPS. Then the job program of the device EPS is transferred to the device MS; a region is secured on the device EPS; and the secured region of the device ESP is purged. As a result, the shunt and restoration of the job program can be carried out in a high speed to simplify the control program. Here CPU, CH and DK indicate a central processor, a channel and a magnetic disk device respectively.
JP10554780A 1980-07-31 1980-07-31 Multiple virtual storage system Pending JPS5733475A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10554780A JPS5733475A (en) 1980-07-31 1980-07-31 Multiple virtual storage system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10554780A JPS5733475A (en) 1980-07-31 1980-07-31 Multiple virtual storage system

Publications (1)

Publication Number Publication Date
JPS5733475A true JPS5733475A (en) 1982-02-23

Family

ID=14410595

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10554780A Pending JPS5733475A (en) 1980-07-31 1980-07-31 Multiple virtual storage system

Country Status (1)

Country Link
JP (1) JPS5733475A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6155752A (en) * 1984-08-28 1986-03-20 Nec Corp Control of expanded memory device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6155752A (en) * 1984-08-28 1986-03-20 Nec Corp Control of expanded memory device

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