JPS5730417A - Analog-to-digital converter - Google Patents

Analog-to-digital converter

Info

Publication number
JPS5730417A
JPS5730417A JP10370980A JP10370980A JPS5730417A JP S5730417 A JPS5730417 A JP S5730417A JP 10370980 A JP10370980 A JP 10370980A JP 10370980 A JP10370980 A JP 10370980A JP S5730417 A JPS5730417 A JP S5730417A
Authority
JP
Japan
Prior art keywords
switch
saz
voltage
timing
operating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10370980A
Other languages
Japanese (ja)
Inventor
Takashi Sase
Kanman Hamada
Shoichi Furutoku
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP10370980A priority Critical patent/JPS5730417A/en
Publication of JPS5730417A publication Critical patent/JPS5730417A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE:To compensate the offset voltage in an A/D converter with high accuracy, by providing a switch canceling the effect of spike charge of a switch and operating it with timing in opposite phase. CONSTITUTION:When an input offset voltage Voff of an integrator INT stored in an automatic zero capacitor CAZ at an automatic zero period is switched the next integrating period, a dummy switch S4 is provided for the effect (g) of the spike charge of a switch SAZ, and (h) is produced by operating it with the timing of opposite phase as the switch SAZ, and a given holding voltage as shown in solid lines of (f) is obtained across the switch SAZ by superimposing (g) and (h). The voltage is as shown in dotted lines in the absence of the dummy switch S4.
JP10370980A 1980-07-30 1980-07-30 Analog-to-digital converter Pending JPS5730417A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10370980A JPS5730417A (en) 1980-07-30 1980-07-30 Analog-to-digital converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10370980A JPS5730417A (en) 1980-07-30 1980-07-30 Analog-to-digital converter

Publications (1)

Publication Number Publication Date
JPS5730417A true JPS5730417A (en) 1982-02-18

Family

ID=14361254

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10370980A Pending JPS5730417A (en) 1980-07-30 1980-07-30 Analog-to-digital converter

Country Status (1)

Country Link
JP (1) JPS5730417A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59125929A (en) * 1982-12-28 1984-07-20 東レ株式会社 Non-torque false twisted yarn and production thereof
JPS6454818A (en) * 1987-08-26 1989-03-02 Pioneer Electronic Corp Offset compensation circuit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS524765A (en) * 1975-06-30 1977-01-14 Hewlett Packard Yokogawa Dual slope analoggtoodigital converter
JPS5361260A (en) * 1976-11-15 1978-06-01 Nippon Telegr & Teleph Corp <Ntt> Glitch minimizing and adjusting method of high-speed d/a

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS524765A (en) * 1975-06-30 1977-01-14 Hewlett Packard Yokogawa Dual slope analoggtoodigital converter
JPS5361260A (en) * 1976-11-15 1978-06-01 Nippon Telegr & Teleph Corp <Ntt> Glitch minimizing and adjusting method of high-speed d/a

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59125929A (en) * 1982-12-28 1984-07-20 東レ株式会社 Non-torque false twisted yarn and production thereof
JPS6454818A (en) * 1987-08-26 1989-03-02 Pioneer Electronic Corp Offset compensation circuit

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