JPS56147518A - Analog-to-digital converter - Google Patents

Analog-to-digital converter

Info

Publication number
JPS56147518A
JPS56147518A JP5036680A JP5036680A JPS56147518A JP S56147518 A JPS56147518 A JP S56147518A JP 5036680 A JP5036680 A JP 5036680A JP 5036680 A JP5036680 A JP 5036680A JP S56147518 A JPS56147518 A JP S56147518A
Authority
JP
Japan
Prior art keywords
capacitor
pulse
clock pulse
charging
synchronizing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5036680A
Other languages
Japanese (ja)
Inventor
Ryohei Saga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Renesas Eastern Japan Semiconductor Inc
Original Assignee
Hitachi Tokyo Electronics Co Ltd
Hitachi Ltd
Hitachi Ome Electronic Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Tokyo Electronics Co Ltd, Hitachi Ltd, Hitachi Ome Electronic Co Ltd filed Critical Hitachi Tokyo Electronics Co Ltd
Priority to JP5036680A priority Critical patent/JPS56147518A/en
Publication of JPS56147518A publication Critical patent/JPS56147518A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE:To prevent error, by counting with a prescribed pulse until the charging voltage to the capacitor by constant current reaches the input voltage from the specified voltage and synchronizing the charging start timing of the capacitor with this pulse. CONSTITUTION:When the A/D conversion starting signal S is inputted, the flip-flop 5 is set after the clock pulse CK is risen to turn off the transistor Q. Thus, since charging to the capacitor C is started in synchronizing with the leading of the clock pulse CK, even if the phase of the clock pulse to the A/D conversion starting signal S is different, the same counting output is obtained.
JP5036680A 1980-04-18 1980-04-18 Analog-to-digital converter Pending JPS56147518A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5036680A JPS56147518A (en) 1980-04-18 1980-04-18 Analog-to-digital converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5036680A JPS56147518A (en) 1980-04-18 1980-04-18 Analog-to-digital converter

Publications (1)

Publication Number Publication Date
JPS56147518A true JPS56147518A (en) 1981-11-16

Family

ID=12856884

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5036680A Pending JPS56147518A (en) 1980-04-18 1980-04-18 Analog-to-digital converter

Country Status (1)

Country Link
JP (1) JPS56147518A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60131405A (en) * 1983-12-20 1985-07-13 Matsushita Electric Ind Co Ltd Position detector
JPH02118334U (en) * 1989-03-10 1990-09-21

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60131405A (en) * 1983-12-20 1985-07-13 Matsushita Electric Ind Co Ltd Position detector
JPH02118334U (en) * 1989-03-10 1990-09-21

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