JPS5728292A - Time synchronization system - Google Patents

Abstract

PURPOSE:To synchronize both clock means by converting the time display of a slave clock means to the time display of a master clock means in response to a time adjusting request signal, and stepping forward clock counters of both clock means at the same value. CONSTITUTION:At the beginning of the operation of the slave clock 3, a time adjustment request switch 30 is depressed, and the time adjustment request signal is generated. When the time adjustment request signal resets a second FF53, the transfer of a present display time 27 is immediately started from a master clock 2 to the slave clock 3. A clock counter 32 in the slave clock 3 is set to the value L, and fixed to this value since the supply of the clock signal is discontinued. When a third decoder 59 decodes the fact that a counter 22 in the master clock 22 becomes the value L under this state, the second FF53 is reset. Then, the counter 32 in the slave clock starts the counting.