JPS5724086A - Repealing cotrol system of buffer memory - Google Patents

Repealing cotrol system of buffer memory

Info

Publication number
JPS5724086A
JPS5724086A JP9779980A JP9779980A JPS5724086A JP S5724086 A JPS5724086 A JP S5724086A JP 9779980 A JP9779980 A JP 9779980A JP 9779980 A JP9779980 A JP 9779980A JP S5724086 A JPS5724086 A JP S5724086A
Authority
JP
Japan
Prior art keywords
repealing
address
buffer
processor
buffer memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9779980A
Other languages
English (en)
Other versions
JPS6349257B2 (ja
Inventor
Hiroshi Tamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP9779980A priority Critical patent/JPS5724086A/ja
Publication of JPS5724086A publication Critical patent/JPS5724086A/ja
Publication of JPS6349257B2 publication Critical patent/JPS6349257B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP9779980A 1980-07-16 1980-07-16 Repealing cotrol system of buffer memory Granted JPS5724086A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9779980A JPS5724086A (en) 1980-07-16 1980-07-16 Repealing cotrol system of buffer memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9779980A JPS5724086A (en) 1980-07-16 1980-07-16 Repealing cotrol system of buffer memory

Publications (2)

Publication Number Publication Date
JPS5724086A true JPS5724086A (en) 1982-02-08
JPS6349257B2 JPS6349257B2 (ja) 1988-10-04

Family

ID=14201828

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9779980A Granted JPS5724086A (en) 1980-07-16 1980-07-16 Repealing cotrol system of buffer memory

Country Status (1)

Country Link
JP (1) JPS5724086A (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6180438A (ja) * 1984-09-28 1986-04-24 Nec Corp キヤツシユメモリ
JPS63163940A (ja) * 1986-09-18 1988-07-07 ディジタル イクイプメント コーポレーション デジタルデータ処理システム

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5476042A (en) * 1977-11-28 1979-06-18 Ibm Multiple processor system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5476042A (en) * 1977-11-28 1979-06-18 Ibm Multiple processor system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6180438A (ja) * 1984-09-28 1986-04-24 Nec Corp キヤツシユメモリ
JPH0431136B2 (ja) * 1984-09-28 1992-05-25
JPS63163940A (ja) * 1986-09-18 1988-07-07 ディジタル イクイプメント コーポレーション デジタルデータ処理システム

Also Published As

Publication number Publication date
JPS6349257B2 (ja) 1988-10-04

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