JPS5721891B2 - - Google Patents

Info

Publication number
JPS5721891B2
JPS5721891B2 JP4398872A JP4398872A JPS5721891B2 JP S5721891 B2 JPS5721891 B2 JP S5721891B2 JP 4398872 A JP4398872 A JP 4398872A JP 4398872 A JP4398872 A JP 4398872A JP S5721891 B2 JPS5721891 B2 JP S5721891B2
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP4398872A
Other languages
Japanese (ja)
Other versions
JPS495562A (en:Method
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP4398872A priority Critical patent/JPS5721891B2/ja
Publication of JPS495562A publication Critical patent/JPS495562A/ja
Publication of JPS5721891B2 publication Critical patent/JPS5721891B2/ja
Expired legal-status Critical Current

Links

Landscapes

  • Shift Register Type Memory (AREA)
  • Logic Circuits (AREA)
  • Static Random-Access Memory (AREA)
JP4398872A 1972-05-02 1972-05-02 Expired JPS5721891B2 (en:Method)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4398872A JPS5721891B2 (en:Method) 1972-05-02 1972-05-02

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4398872A JPS5721891B2 (en:Method) 1972-05-02 1972-05-02

Publications (2)

Publication Number Publication Date
JPS495562A JPS495562A (en:Method) 1974-01-18
JPS5721891B2 true JPS5721891B2 (en:Method) 1982-05-10

Family

ID=12679082

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4398872A Expired JPS5721891B2 (en:Method) 1972-05-02 1972-05-02

Country Status (1)

Country Link
JP (1) JPS5721891B2 (en:Method)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5511242Y2 (en:Method) * 1974-05-11 1980-03-11
JPS586235B2 (ja) * 1974-07-16 1983-02-03 日本電気株式会社 Mis ガタトランジスタカイロ
JPS5169650A (ja) * 1974-10-31 1976-06-16 Tokyo Shibaura Electric Co Kenshintanmatsusochi
JPS5160759U (en:Method) * 1974-11-08 1976-05-13
JPS51129144A (en) * 1975-05-02 1976-11-10 Toshiba Corp Memory divice of non volatile information
JPS5778498U (en:Method) * 1981-09-24 1982-05-14
US4571709A (en) * 1983-01-31 1986-02-18 Intel Corporation Timing apparatus for non-volatile MOS RAM
JPH0666612B2 (ja) * 1987-05-26 1994-08-24 ザイコール・インコーポレーテッド 再プログラム可能な不揮発性非線形電子ポテンショメータ
US6331768B1 (en) 2000-06-13 2001-12-18 Xicor, Inc. High-resolution, high-precision solid-state potentiometer
JP5839474B2 (ja) 2011-03-24 2016-01-06 株式会社半導体エネルギー研究所 信号処理回路

Also Published As

Publication number Publication date
JPS495562A (en:Method) 1974-01-18

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