JPS495562A - - Google Patents
Info
- Publication number
- JPS495562A JPS495562A JP47043988A JP4398872A JPS495562A JP S495562 A JPS495562 A JP S495562A JP 47043988 A JP47043988 A JP 47043988A JP 4398872 A JP4398872 A JP 4398872A JP S495562 A JPS495562 A JP S495562A
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Shift Register Type Memory (AREA)
- Logic Circuits (AREA)
- Static Random-Access Memory (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4398872A JPS5721891B2 (en:Method) | 1972-05-02 | 1972-05-02 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4398872A JPS5721891B2 (en:Method) | 1972-05-02 | 1972-05-02 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS495562A true JPS495562A (en:Method) | 1974-01-18 |
| JPS5721891B2 JPS5721891B2 (en:Method) | 1982-05-10 |
Family
ID=12679082
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4398872A Expired JPS5721891B2 (en:Method) | 1972-05-02 | 1972-05-02 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5721891B2 (en:Method) |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50143402U (en:Method) * | 1974-05-11 | 1975-11-27 | ||
| JPS5110775A (en) * | 1974-07-16 | 1976-01-28 | Nippon Electric Co | Mis gatatoranjisutakairo |
| JPS5160759U (en:Method) * | 1974-11-08 | 1976-05-13 | ||
| JPS5169650A (ja) * | 1974-10-31 | 1976-06-16 | Tokyo Shibaura Electric Co | Kenshintanmatsusochi |
| JPS51129144A (en) * | 1975-05-02 | 1976-11-10 | Toshiba Corp | Memory divice of non volatile information |
| JPS5778498U (en:Method) * | 1981-09-24 | 1982-05-14 | ||
| JPS59144096A (ja) * | 1983-01-31 | 1984-08-17 | インテル・コ−ポレ−シヨン | 集積回路金属酸化膜半導体不揮発性メモリ |
| JPH0666612B2 (ja) * | 1987-05-26 | 1994-08-24 | ザイコール・インコーポレーテッド | 再プログラム可能な不揮発性非線形電子ポテンショメータ |
| US6331768B1 (en) | 2000-06-13 | 2001-12-18 | Xicor, Inc. | High-resolution, high-precision solid-state potentiometer |
| WO2012128189A1 (en) * | 2011-03-24 | 2012-09-27 | Semiconductor Energy Laboratory Co., Ltd. | Signal processing circuit |
-
1972
- 1972-05-02 JP JP4398872A patent/JPS5721891B2/ja not_active Expired
Cited By (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50143402U (en:Method) * | 1974-05-11 | 1975-11-27 | ||
| JPS5110775A (en) * | 1974-07-16 | 1976-01-28 | Nippon Electric Co | Mis gatatoranjisutakairo |
| JPS5169650A (ja) * | 1974-10-31 | 1976-06-16 | Tokyo Shibaura Electric Co | Kenshintanmatsusochi |
| JPS5160759U (en:Method) * | 1974-11-08 | 1976-05-13 | ||
| JPS51129144A (en) * | 1975-05-02 | 1976-11-10 | Toshiba Corp | Memory divice of non volatile information |
| JPS5778498U (en:Method) * | 1981-09-24 | 1982-05-14 | ||
| JPS59144096A (ja) * | 1983-01-31 | 1984-08-17 | インテル・コ−ポレ−シヨン | 集積回路金属酸化膜半導体不揮発性メモリ |
| JPH0666612B2 (ja) * | 1987-05-26 | 1994-08-24 | ザイコール・インコーポレーテッド | 再プログラム可能な不揮発性非線形電子ポテンショメータ |
| US6331768B1 (en) | 2000-06-13 | 2001-12-18 | Xicor, Inc. | High-resolution, high-precision solid-state potentiometer |
| US6555996B2 (en) | 2000-06-13 | 2003-04-29 | Xicor, Inc. | High-resolution, high-precision solid-state potentiometer |
| WO2012128189A1 (en) * | 2011-03-24 | 2012-09-27 | Semiconductor Energy Laboratory Co., Ltd. | Signal processing circuit |
| JP2012256405A (ja) * | 2011-03-24 | 2012-12-27 | Semiconductor Energy Lab Co Ltd | 信号処理回路 |
| US8958252B2 (en) | 2011-03-24 | 2015-02-17 | Semiconductor Energy Laboratory Co., Ltd. | Signal processing circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5721891B2 (en:Method) | 1982-05-10 |