JPS57211660A - Data transfer system for multiprocessor device - Google Patents
Data transfer system for multiprocessor deviceInfo
- Publication number
- JPS57211660A JPS57211660A JP9540281A JP9540281A JPS57211660A JP S57211660 A JPS57211660 A JP S57211660A JP 9540281 A JP9540281 A JP 9540281A JP 9540281 A JP9540281 A JP 9540281A JP S57211660 A JPS57211660 A JP S57211660A
- Authority
- JP
- Japan
- Prior art keywords
- unit
- data transfer
- cpu
- bus
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/167—Interprocessor communication using a common memory, e.g. mailbox
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multi Processors (AREA)
- Information Transfer Systems (AREA)
Abstract
PURPOSE:To make the data transfer between CPU units possible without paying attention to the control state of the CPU of the data transfer destination, by using a main storage device as a medium and controlling properly a common bus. CONSTITUTION:A main storage device 13 is used as a medium through a common bus 15 for the data transfer among CPU units 12-0-12-N. When the CPU unit 12-1 requests the data transfer to the CPU unit 12-0, the unit 12-1 uses the bus 15 to transfer data. The unit 12-0 monitors always the device 13 and accesses the device 13 at its convenience when the bus 15 is idle, and data transferred from the unit 12-1 is taken into the unit 12-0.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9540281A JPS57211660A (en) | 1981-06-22 | 1981-06-22 | Data transfer system for multiprocessor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9540281A JPS57211660A (en) | 1981-06-22 | 1981-06-22 | Data transfer system for multiprocessor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57211660A true JPS57211660A (en) | 1982-12-25 |
Family
ID=14136664
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9540281A Pending JPS57211660A (en) | 1981-06-22 | 1981-06-22 | Data transfer system for multiprocessor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57211660A (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5081646A (en) * | 1973-11-21 | 1975-07-02 | ||
JPS55116122A (en) * | 1979-02-28 | 1980-09-06 | Nec Corp | Information processor |
-
1981
- 1981-06-22 JP JP9540281A patent/JPS57211660A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5081646A (en) * | 1973-11-21 | 1975-07-02 | ||
JPS55116122A (en) * | 1979-02-28 | 1980-09-06 | Nec Corp | Information processor |
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