JPS57211238A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS57211238A JPS57211238A JP9625981A JP9625981A JPS57211238A JP S57211238 A JPS57211238 A JP S57211238A JP 9625981 A JP9625981 A JP 9625981A JP 9625981 A JP9625981 A JP 9625981A JP S57211238 A JPS57211238 A JP S57211238A
- Authority
- JP
- Japan
- Prior art keywords
- film
- thickness
- semiconductor
- substrate
- atomic layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title abstract 7
- 239000000758 substrate Substances 0.000 abstract 4
- 229910001218 Gallium arsenide Inorganic materials 0.000 abstract 2
- 150000001875 compounds Chemical class 0.000 abstract 2
- 230000015572 biosynthetic process Effects 0.000 abstract 1
- 230000007547 defect Effects 0.000 abstract 1
- 230000002349 favourable effect Effects 0.000 abstract 1
- 230000002265 prevention Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Formation Of Insulating Films (AREA)
- Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
Abstract
PURPOSE:To enable to obtain an MIS structural semiconductor device having extremely low density of interfacial surface level by a method wherein between a semiconductor substrate consisting of the III-V group compound semiconductor and an insulating film, a semiconductor layer being different from the semiconductor thereof and having the prescribed film thickness is inserted. CONSTITUTION:The Si film 2 having thidkness of 1-5 atomic layer is provided comingin contact with the substrate 1 consisting of the III-V group compound semiconductor, GaAs for example, and the insulating film 3 consisting of Si oxide is provided coming in contact with the film 2. The discrepancy of lattice constants between GaAs and Si is about 4%, and when thickness of the Si film 2 to be adhered exceeds thickness of 5 atomic layer, an unpaired junction is formed in the interface between the substrate 1 and the film 2 to generate the surface state. While when thickness thereof is less than thickness of 5 atomic layer, by generation of distortion in the lattice of Si, the unpaired junction is not generated in the interface. Moreover the favorable interface can be obtained between the film 2 and the film 3, and low density of the surface state of 10<11>cm<-2> or less can be realized. While for prevention of defect formation in the surface of the substrate 1, it is necessary to cover with the film 2 being at least one atomic layer or more.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9625981A JPS57211238A (en) | 1981-06-22 | 1981-06-22 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9625981A JPS57211238A (en) | 1981-06-22 | 1981-06-22 | Semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57211238A true JPS57211238A (en) | 1982-12-25 |
JPH0328055B2 JPH0328055B2 (en) | 1991-04-17 |
Family
ID=14160185
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9625981A Granted JPS57211238A (en) | 1981-06-22 | 1981-06-22 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57211238A (en) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59119869A (en) * | 1982-12-27 | 1984-07-11 | Fujitsu Ltd | Semiconductor device |
JPS59127839A (en) * | 1983-01-11 | 1984-07-23 | Nec Corp | Inactivation of surface of iv-v group element compound semiconductor |
JPS59172728A (en) * | 1983-03-22 | 1984-09-29 | Fujitsu Ltd | Semiconductor device |
EP0250161A2 (en) * | 1986-06-18 | 1987-12-23 | AT&T Corp. | Method of manufacturing devices including a semiconductor/dielectric interface |
JPS63274176A (en) * | 1987-05-06 | 1988-11-11 | Seiko Instr & Electronics Ltd | Insulated-gate field-effect transistor |
JPH0226073A (en) * | 1988-06-15 | 1990-01-29 | Internatl Business Mach Corp <Ibm> | Manufacture of compound semiconductor device, compound semiconductor device and field effect transistor |
JP2006173574A (en) * | 2004-10-13 | 2006-06-29 | Interuniv Micro Electronica Centrum Vzw | Method of making inactivated semiconductor substrate |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5513956A (en) * | 1978-07-17 | 1980-01-31 | Nec Corp | Insulation film forming method for compound semiconductor |
JPS5671943A (en) * | 1979-11-16 | 1981-06-15 | Oki Electric Ind Co Ltd | Oxide film coating of compound semiconductor device |
-
1981
- 1981-06-22 JP JP9625981A patent/JPS57211238A/en active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5513956A (en) * | 1978-07-17 | 1980-01-31 | Nec Corp | Insulation film forming method for compound semiconductor |
JPS5671943A (en) * | 1979-11-16 | 1981-06-15 | Oki Electric Ind Co Ltd | Oxide film coating of compound semiconductor device |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59119869A (en) * | 1982-12-27 | 1984-07-11 | Fujitsu Ltd | Semiconductor device |
JPS59127839A (en) * | 1983-01-11 | 1984-07-23 | Nec Corp | Inactivation of surface of iv-v group element compound semiconductor |
JPS59172728A (en) * | 1983-03-22 | 1984-09-29 | Fujitsu Ltd | Semiconductor device |
EP0250161A2 (en) * | 1986-06-18 | 1987-12-23 | AT&T Corp. | Method of manufacturing devices including a semiconductor/dielectric interface |
JPS63274176A (en) * | 1987-05-06 | 1988-11-11 | Seiko Instr & Electronics Ltd | Insulated-gate field-effect transistor |
JPH0226073A (en) * | 1988-06-15 | 1990-01-29 | Internatl Business Mach Corp <Ibm> | Manufacture of compound semiconductor device, compound semiconductor device and field effect transistor |
JP2006173574A (en) * | 2004-10-13 | 2006-06-29 | Interuniv Micro Electronica Centrum Vzw | Method of making inactivated semiconductor substrate |
Also Published As
Publication number | Publication date |
---|---|
JPH0328055B2 (en) | 1991-04-17 |
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