JPS57206183A - Picture and voice multiplexing system - Google Patents

Picture and voice multiplexing system

Info

Publication number
JPS57206183A
JPS57206183A JP9179881A JP9179881A JPS57206183A JP S57206183 A JPS57206183 A JP S57206183A JP 9179881 A JP9179881 A JP 9179881A JP 9179881 A JP9179881 A JP 9179881A JP S57206183 A JPS57206183 A JP S57206183A
Authority
JP
Japan
Prior art keywords
clock
voice
picture
deleted
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9179881A
Other languages
Japanese (ja)
Inventor
Makoto Hiraoka
Toshio Hanabatake
Yoshiji Nishizawa
Toshihiro Yamanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP9179881A priority Critical patent/JPS57206183A/en
Publication of JPS57206183A publication Critical patent/JPS57206183A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/24—Systems for the transmission of television signals using pulse code modulation
    • H04N7/52—Systems for transmission of a pulse code modulated video signal with one or more other pulse code modulated signals, e.g. an audio signal or a synchronizing signal
    • H04N7/54—Systems for transmission of a pulse code modulated video signal with one or more other pulse code modulated signals, e.g. an audio signal or a synchronizing signal the signals being synchronous

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Television Systems (AREA)

Abstract

PURPOSE:To realize the transmission of picture and voice with high efficiency and through a miniature device, by multiplexing both the video and voice signals with only the clock that is produced by a single clock generator. CONSTITUTION:The clock CLK1 produced from a clock generator 14 is deleted through a 4-bit clock deleting circuit 13 and based on the voice data inserting clock CLK3. The deleted clock CLK2 is fed to a buffer memory 9, a control circuit 12 and a voice register 10 respectively. Thus a picture data is read out of the memory 9 by the clock CLK2, and the voice data is read out of the register 10 by the deleted clock. Then the video signal is multiplexed by a multiplexing circuit 11 along with the voice synchronizing signal which is supplied from a control circuit 12.
JP9179881A 1981-06-15 1981-06-15 Picture and voice multiplexing system Pending JPS57206183A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9179881A JPS57206183A (en) 1981-06-15 1981-06-15 Picture and voice multiplexing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9179881A JPS57206183A (en) 1981-06-15 1981-06-15 Picture and voice multiplexing system

Publications (1)

Publication Number Publication Date
JPS57206183A true JPS57206183A (en) 1982-12-17

Family

ID=14036627

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9179881A Pending JPS57206183A (en) 1981-06-15 1981-06-15 Picture and voice multiplexing system

Country Status (1)

Country Link
JP (1) JPS57206183A (en)

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