JPS57203980A - Radar display circuit - Google Patents

Radar display circuit

Info

Publication number
JPS57203980A
JPS57203980A JP56089788A JP8978881A JPS57203980A JP S57203980 A JPS57203980 A JP S57203980A JP 56089788 A JP56089788 A JP 56089788A JP 8978881 A JP8978881 A JP 8978881A JP S57203980 A JPS57203980 A JP S57203980A
Authority
JP
Japan
Prior art keywords
ppi
deflection data
sweep
clock
led
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56089788A
Other languages
Japanese (ja)
Other versions
JPS6326875B2 (en
Inventor
Yoshio Hayashi
Yoshihiko Take
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56089788A priority Critical patent/JPS57203980A/en
Publication of JPS57203980A publication Critical patent/JPS57203980A/en
Publication of JPS6326875B2 publication Critical patent/JPS6326875B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
    • G01S7/02—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
    • G01S7/04—Display arrangements
    • G01S7/06—Cathode-ray tube displays or other two dimensional or three-dimensional displays
    • G01S7/10—Providing two-dimensional and co-ordinated display of distance and direction
    • G01S7/12—Plan-position indicators, i.e. P.P.I.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Radar Systems Or Details Thereof (AREA)

Abstract

PURPOSE:To unnecessitate a separate PPI (Plan Position Indicator) sweep generating circuit by controlling the cycle of a reference clock differently between PPI deflection data and digital line display deflection data. CONSTITUTION:Digital display deflection data are led to a digital line display deflection data buffer 20, while PPI sweep deflection data being led to a PPI sweep deflection data buffer 21, and outputs of buffers 20 and 21 are led to a line generating circuit 10 by time sharing, respectively. Then, by using a video compression circuit or the like together corresponding to the range switching of a radar area range, one kind of clock of a radar video becomes sufficient enough, and PPI can be generated irrespective of a real time. Accordingly, two kinds of clocks, i.e. a digital line generating clock and a PPI sweep generating clock, are sufficient enough for reference clocks of the line generating circuit 10.
JP56089788A 1981-06-10 1981-06-10 Radar display circuit Granted JPS57203980A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56089788A JPS57203980A (en) 1981-06-10 1981-06-10 Radar display circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56089788A JPS57203980A (en) 1981-06-10 1981-06-10 Radar display circuit

Publications (2)

Publication Number Publication Date
JPS57203980A true JPS57203980A (en) 1982-12-14
JPS6326875B2 JPS6326875B2 (en) 1988-05-31

Family

ID=13980416

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56089788A Granted JPS57203980A (en) 1981-06-10 1981-06-10 Radar display circuit

Country Status (1)

Country Link
JP (1) JPS57203980A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60138482A (en) * 1983-12-27 1985-07-23 Toshiba Corp Arc raster and stroke scanning display device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0766236B2 (en) * 1989-02-20 1995-07-19 シャープ株式会社 Portable character processor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60138482A (en) * 1983-12-27 1985-07-23 Toshiba Corp Arc raster and stroke scanning display device

Also Published As

Publication number Publication date
JPS6326875B2 (en) 1988-05-31

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