JPS57201387A - Character pattern information receiver - Google Patents

Abstract

PURPOSE:To generate control signals for reception of a character pattern multiplex signal and for a memory, and to prevent the occurrence of malfunction, by providing the 2nd AFC and oscillating circuit which generates an output having a constant phase relation with a horizontal synchronizing signal invariably in addition to a circuit for horizontal deflection. CONSTITUTION:In addition to a horizontal AFC circuit 6A for horizontal deflection and a horizontal oscillating circuit 60, the 2nd horizontal AFC circuit 15A and horizontal oscillating circuit 150 are provided on the output side of the synchronous separating circuit 5 of a color TV receiver. Those circuits 15A and 150 apply a write clock generating circuit 9 with a pulse signal which has a constant phase relation with a horizontal synchronizing signal. Further, a binary signal from a slicing circuit 8 is applied to a memory control circuit 10, and a clock for smapling a character pattern information signal received from the circuit 9 is applied to the circuit. Then, the circuit 10 generates a control signal for character pattern reception and for the writing of a memory 12 and on the basis of the clock of a read clock generating circuit 11, a readout control signal for the memory 12 is generated.