JPS57201390A - Character pattern information receiver - Google Patents
Character pattern information receiverInfo
- Publication number
- JPS57201390A JPS57201390A JP56086086A JP8608681A JPS57201390A JP S57201390 A JPS57201390 A JP S57201390A JP 56086086 A JP56086086 A JP 56086086A JP 8608681 A JP8608681 A JP 8608681A JP S57201390 A JPS57201390 A JP S57201390A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- horizontal
- signal
- character pattern
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/025—Systems for the transmission of digital non-picture data, e.g. of text during the active part of a television frame
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Television Systems (AREA)
Abstract
PURPOSE:To generate an output which has a constant phase relation with a horizontal synchronizing signal invariably, to generate a control signal for the reception of a character pattern multiplex signal and control signal for a memory, and to stabilize a reception state invariably, by providing the 2nd AFC and oscillating circuit in addition to circuits for horizontal deflection. CONSTITUTION:In addition to horizontal AFC and horizontal oscillating circuits 6A and 60 for deflection, horizontal AFC and horizontal oscillating circuits 15A and 150 are provided on the output side of the synchronous separating circuit 5 of a color TV receiver. Those circuits 15A and 150 supply outputs, which have constant phase relations with a horizontal synchronizing signal invariably, to a write clock generating circuit 9. This circuit 9 applies a clock for sampling a received character pattern information signal to a memory control processing circuit 10, and also applies the signal obtained by converting a received detected waveform from a slicing circuit 8 into a binary signal. The circuit 10 generates a control signal for character pattern reception and that for the writing of a memory 12, and by the output of a readout clock generating circuit 11 which inputs the clock of the circuit 60, a readout control signal for the memory 12 is generated.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56086086A JPS57201390A (en) | 1981-06-03 | 1981-06-03 | Character pattern information receiver |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56086086A JPS57201390A (en) | 1981-06-03 | 1981-06-03 | Character pattern information receiver |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57201390A true JPS57201390A (en) | 1982-12-09 |
| JPS6157754B2 JPS6157754B2 (en) | 1986-12-08 |
Family
ID=13876890
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56086086A Granted JPS57201390A (en) | 1981-06-03 | 1981-06-03 | Character pattern information receiver |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57201390A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6016781A (en) * | 1983-07-08 | 1985-01-28 | Sharp Corp | Character broadcast receiver |
| JPS60121840A (en) * | 1983-12-05 | 1985-06-29 | Matsushita Electric Ind Co Ltd | Time-division multiple signal transmission system |
-
1981
- 1981-06-03 JP JP56086086A patent/JPS57201390A/en active Granted
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6016781A (en) * | 1983-07-08 | 1985-01-28 | Sharp Corp | Character broadcast receiver |
| JPS60121840A (en) * | 1983-12-05 | 1985-06-29 | Matsushita Electric Ind Co Ltd | Time-division multiple signal transmission system |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6157754B2 (en) | 1986-12-08 |
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