JPS57199053A - Executing and processing system for control instruction - Google Patents
Executing and processing system for control instructionInfo
- Publication number
- JPS57199053A JPS57199053A JP56083462A JP8346281A JPS57199053A JP S57199053 A JPS57199053 A JP S57199053A JP 56083462 A JP56083462 A JP 56083462A JP 8346281 A JP8346281 A JP 8346281A JP S57199053 A JPS57199053 A JP S57199053A
- Authority
- JP
- Japan
- Prior art keywords
- control instruction
- information
- section
- flag
- pass word
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Executing Machine-Instructions (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Abstract
PURPOSE:To easily perform the operating function protection of a system, by providing a pass word for a specific operand of a control instruction and providing a decided result storage flag and pass word propriety deciding means in the execution of control instruction. CONSTITUTION:A pass word information PW is provided for a specific operand of an instruction word constituting a control instruction, and the information PW is given to a comparison deciding section 101 with a control information DS set in advance to a data processing section 102 adhead the execution of processing operation in accordance with the control instruction to decide the propriety of the information PW. If the PW is correct, a coincidence signal C is outputted from the deciding section 101, and the signal C sets a flag section 103. Thus, the information CD is made effective, the operation in accordance with the information CD is executed. If the PW is not correct, no flag section is set, the control instruction is made ineffective, no-operation processing is made and the control instruction gives no effect on the system, allowing to protect the operating function of the system if the control instruction is issued by error.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56083462A JPS57199053A (en) | 1981-05-30 | 1981-05-30 | Executing and processing system for control instruction |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56083462A JPS57199053A (en) | 1981-05-30 | 1981-05-30 | Executing and processing system for control instruction |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57199053A true JPS57199053A (en) | 1982-12-06 |
Family
ID=13803125
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56083462A Pending JPS57199053A (en) | 1981-05-30 | 1981-05-30 | Executing and processing system for control instruction |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57199053A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS603748A (en) * | 1983-06-22 | 1985-01-10 | Toshiba Corp | Collating method of memory for controller |
JPS605342A (en) * | 1983-06-23 | 1985-01-11 | Nippon Telegr & Teleph Corp <Ntt> | Instruction control system |
-
1981
- 1981-05-30 JP JP56083462A patent/JPS57199053A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS603748A (en) * | 1983-06-22 | 1985-01-10 | Toshiba Corp | Collating method of memory for controller |
JPS605342A (en) * | 1983-06-23 | 1985-01-11 | Nippon Telegr & Teleph Corp <Ntt> | Instruction control system |
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