JPS57192140A - Multipath interference eliminating circuit - Google Patents

Multipath interference eliminating circuit

Info

Publication number
JPS57192140A
JPS57192140A JP7689981A JP7689981A JPS57192140A JP S57192140 A JPS57192140 A JP S57192140A JP 7689981 A JP7689981 A JP 7689981A JP 7689981 A JP7689981 A JP 7689981A JP S57192140 A JPS57192140 A JP S57192140A
Authority
JP
Japan
Prior art keywords
signal
stage
detecting
multipath interference
detected
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7689981A
Other languages
English (en)
Other versions
JPH0318375B2 (ja
Inventor
Akira Usui
Kanji Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Original Assignee
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Sanyo Electric Co Ltd, Sanyo Electric Co Ltd, Sanyo Denki Co Ltd filed Critical Tokyo Sanyo Electric Co Ltd
Priority to JP7689981A priority Critical patent/JPS57192140A/ja
Publication of JPS57192140A publication Critical patent/JPS57192140A/ja
Publication of JPH0318375B2 publication Critical patent/JPH0318375B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/10—Means associated with receiver for limiting or suppressing noise or interference

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Filters And Equalizers (AREA)
  • Noise Elimination (AREA)
JP7689981A 1981-05-20 1981-05-20 Multipath interference eliminating circuit Granted JPS57192140A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7689981A JPS57192140A (en) 1981-05-20 1981-05-20 Multipath interference eliminating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7689981A JPS57192140A (en) 1981-05-20 1981-05-20 Multipath interference eliminating circuit

Publications (2)

Publication Number Publication Date
JPS57192140A true JPS57192140A (en) 1982-11-26
JPH0318375B2 JPH0318375B2 (ja) 1991-03-12

Family

ID=13618498

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7689981A Granted JPS57192140A (en) 1981-05-20 1981-05-20 Multipath interference eliminating circuit

Country Status (1)

Country Link
JP (1) JPS57192140A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1987004578A1 (en) * 1986-01-25 1987-07-30 Fujitsu Ten Limited Noise-removing device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1987004578A1 (en) * 1986-01-25 1987-07-30 Fujitsu Ten Limited Noise-removing device
EP0253902A1 (en) * 1986-01-25 1988-01-27 Fujitsu Ten, Ltd. Noise reduction apparatus and method

Also Published As

Publication number Publication date
JPH0318375B2 (ja) 1991-03-12

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