JPS57189253A - Information processor - Google Patents
Information processorInfo
- Publication number
- JPS57189253A JPS57189253A JP56073763A JP7376381A JPS57189253A JP S57189253 A JPS57189253 A JP S57189253A JP 56073763 A JP56073763 A JP 56073763A JP 7376381 A JP7376381 A JP 7376381A JP S57189253 A JPS57189253 A JP S57189253A
- Authority
- JP
- Japan
- Prior art keywords
- psw
- mode section
- virtual computer
- registers
- information
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Abstract
PURPOSE:To save overhead, by providing a plurality of registers storing a mode section additionally and selecting and indicating one of effective registers during run, in a virtual computer system. CONSTITUTION:In an information processing device provided with a register 20 storing a program status word PSW and a status register 8 and running a plurality of operating systems on one computer multiplexedly, at the execution of program status work PSW renewal instruction, a mode section of the real PSW is stored as it is, assigned simulation registers 18 and 19 are renewed, and at the reception of interruption, the mode section of a virtual computer is reflected as the old PSW information. Thus, the old PSW information can be transferred to a virtual computer prefix area.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56073763A JPS57189253A (en) | 1981-05-15 | 1981-05-15 | Information processor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56073763A JPS57189253A (en) | 1981-05-15 | 1981-05-15 | Information processor |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57189253A true JPS57189253A (en) | 1982-11-20 |
Family
ID=13527578
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56073763A Pending JPS57189253A (en) | 1981-05-15 | 1981-05-15 | Information processor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57189253A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2580096A1 (en) * | 1985-04-04 | 1986-10-10 | Nec Corp |
-
1981
- 1981-05-15 JP JP56073763A patent/JPS57189253A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2580096A1 (en) * | 1985-04-04 | 1986-10-10 | Nec Corp |
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