JPS57182852A - Stack device - Google Patents

Stack device

Info

Publication number
JPS57182852A
JPS57182852A JP56068588A JP6858881A JPS57182852A JP S57182852 A JPS57182852 A JP S57182852A JP 56068588 A JP56068588 A JP 56068588A JP 6858881 A JP6858881 A JP 6858881A JP S57182852 A JPS57182852 A JP S57182852A
Authority
JP
Japan
Prior art keywords
register stacks
register
stacks
job program
switching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56068588A
Other languages
Japanese (ja)
Other versions
JPH0245207B2 (en
Inventor
Masahiro Yamamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56068588A priority Critical patent/JPS57182852A/en
Publication of JPS57182852A publication Critical patent/JPS57182852A/en
Publication of JPH0245207B2 publication Critical patent/JPH0245207B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Devices For Executing Special Programs (AREA)

Abstract

PURPOSE:To switch register stacks efficiently, by providing plural pairs of register stacks consisting of many words in a central processing device and switching and using these register stacks for execution of a job program. CONSTITUTION:Plural pairs of register stacks 1 and 2 which consist of plural words and are controlled in the last-in first-out system, a main storage device 3 where data driven out from these register stacks is accumulated in the last-in first-out system, and an operation processing unit 4 are provided. One of register stacks 1 and 2 is used to execute one job program; and when the switching to another job program is required, another register stack is used to process this job program, and a controlling means 7 is provided which drives out data, which are accumulated in register stacks 1 and 2 which have been used, to the main storage device. Thus, register stacks are switched efficiently for switching of jobs.
JP56068588A 1981-05-07 1981-05-07 Stack device Granted JPS57182852A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56068588A JPS57182852A (en) 1981-05-07 1981-05-07 Stack device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56068588A JPS57182852A (en) 1981-05-07 1981-05-07 Stack device

Publications (2)

Publication Number Publication Date
JPS57182852A true JPS57182852A (en) 1982-11-10
JPH0245207B2 JPH0245207B2 (en) 1990-10-08

Family

ID=13378098

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56068588A Granted JPS57182852A (en) 1981-05-07 1981-05-07 Stack device

Country Status (1)

Country Link
JP (1) JPS57182852A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59123935A (en) * 1982-12-29 1984-07-17 Fujitsu Ltd Stack device
JPS61182138A (en) * 1984-11-21 1986-08-14 ノビツクス Forth specified language microprocessor
JP2009540438A (en) * 2006-06-06 2009-11-19 クゥアルコム・インコーポレイテッド Processor core stack expansion

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ATE241170T1 (en) * 1995-10-06 2003-06-15 Patriot Scient Corp ARCHITECTURE FOR A RISC MICROPROCESSOR

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59123935A (en) * 1982-12-29 1984-07-17 Fujitsu Ltd Stack device
JPS61182138A (en) * 1984-11-21 1986-08-14 ノビツクス Forth specified language microprocessor
JPH07210398A (en) * 1984-11-21 1995-08-11 Novix Forth specific language microprocessor
JP2009540438A (en) * 2006-06-06 2009-11-19 クゥアルコム・インコーポレイテッド Processor core stack expansion

Also Published As

Publication number Publication date
JPH0245207B2 (en) 1990-10-08

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