JPS57182845A - Digital multiplying circuit - Google Patents

Digital multiplying circuit

Info

Publication number
JPS57182845A
JPS57182845A JP56069234A JP6923481A JPS57182845A JP S57182845 A JPS57182845 A JP S57182845A JP 56069234 A JP56069234 A JP 56069234A JP 6923481 A JP6923481 A JP 6923481A JP S57182845 A JPS57182845 A JP S57182845A
Authority
JP
Japan
Prior art keywords
bits
holder
bit
multiplier
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56069234A
Other languages
Japanese (ja)
Other versions
JPS6150335B2 (en
Inventor
Masao Kasuga
Yoshiyuki Tsuchikane
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Victor Company of Japan Ltd
Nippon Victor KK
Original Assignee
Victor Company of Japan Ltd
Nippon Victor KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Victor Company of Japan Ltd, Nippon Victor KK filed Critical Victor Company of Japan Ltd
Priority to JP56069234A priority Critical patent/JPS57182845A/en
Publication of JPS57182845A publication Critical patent/JPS57182845A/en
Publication of JPS6150335B2 publication Critical patent/JPS6150335B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/523—Multiplying only
    • G06F7/53—Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel
    • G06F7/5324—Multiplying only in parallel-parallel fashion, i.e. both operands being entered in parallel partitioned, i.e. using repetitively a smaller parallel parallel multiplier or using an array of such smaller multipliers

Abstract

PURPOSE:To make the multiplication processing possible with the double precision operation even if the number of bits of input data is larger than the number of bits of a multiplier, by providing a holding circuit which divides an input signal to upper and lower bit sequences and holds them, a signal processing circuit for the bit shift or the like, etc. CONSTITUTION:For example, in respect to 8-bit input data, upper 4 bits are inputted to an input holder 12, and lower 4 bits are inputted to a holder 13. The output of the holder 12 and the coefficient of a coefficient equipment 4 are multiplied in a multiplier 6, and the result is supplied to a holder 7. In a signal processor 14, upper bits are shifted to lower bits bit by bit, and 0 is entered to the MSB. The output of the processor 6 and the coefficient are multiplier in the multiplier 6, and the result is supplied to the holder 7. In a signal processor 15, 8-bit data of the multiplication result is first doubled. This data is shifted to the right by 4 bits for the digit alignment to the operation result of upper bits stored in the holder 7. This output and the output of the holder 7 are added in an adder 9.
JP56069234A 1981-05-08 1981-05-08 Digital multiplying circuit Granted JPS57182845A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56069234A JPS57182845A (en) 1981-05-08 1981-05-08 Digital multiplying circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56069234A JPS57182845A (en) 1981-05-08 1981-05-08 Digital multiplying circuit

Publications (2)

Publication Number Publication Date
JPS57182845A true JPS57182845A (en) 1982-11-10
JPS6150335B2 JPS6150335B2 (en) 1986-11-04

Family

ID=13396838

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56069234A Granted JPS57182845A (en) 1981-05-08 1981-05-08 Digital multiplying circuit

Country Status (1)

Country Link
JP (1) JPS57182845A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61118012A (en) * 1984-11-14 1986-06-05 Sony Corp Digital filter

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61118012A (en) * 1984-11-14 1986-06-05 Sony Corp Digital filter

Also Published As

Publication number Publication date
JPS6150335B2 (en) 1986-11-04

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