JPS57180228A - Variable delay circuit - Google Patents

Variable delay circuit

Info

Publication number
JPS57180228A
JPS57180228A JP56064270A JP6427081A JPS57180228A JP S57180228 A JPS57180228 A JP S57180228A JP 56064270 A JP56064270 A JP 56064270A JP 6427081 A JP6427081 A JP 6427081A JP S57180228 A JPS57180228 A JP S57180228A
Authority
JP
Japan
Prior art keywords
circuit
output
terminal
pulse
coefficient
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56064270A
Other languages
Japanese (ja)
Other versions
JPS5924566B2 (en
Inventor
Toshihiro Torii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Iwatsu Electric Co Ltd
Iwasaki Tsushinki KK
Original Assignee
Iwatsu Electric Co Ltd
Iwasaki Tsushinki KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Iwatsu Electric Co Ltd, Iwasaki Tsushinki KK filed Critical Iwatsu Electric Co Ltd
Priority to JP56064270A priority Critical patent/JPS5924566B2/en
Publication of JPS57180228A publication Critical patent/JPS57180228A/en
Publication of JPS5924566B2 publication Critical patent/JPS5924566B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Electronic Switches (AREA)
  • Pulse Circuits (AREA)

Abstract

PURPOSE:To adjust the delay time of pulse easily and accurately, by weighting and adding an output of a delay circuit delaying a pulse signal for a fixed time and an output of a delay time different from said circuit with a coefficient and changing the coefficient. CONSTITUTION:An input pulse from a terminal 10 is branched into a delay circuit 13 and a transmission line 15 via a driving amplifier 11, and an output signal delayed for a prescribed time at the circuit 13 and a signal from the line 15 are respectively inputted to terminals 17 and 18 of a variable addition circuit 16. The input signal to the terminals 17 and 18 is inputted to both ends of a variable resistor 20 via driving amplifiers 21 and 22, respectively. A movable piece 24 of the resistor 20 is connected to an output terminal 19, and assuming the ratio of resistance between the movable piece 24 and the amplifier 21 to the entire resistance of the resistor 20 as K, the coefficient K can continuously be changed with the position of the movable piece. An output of the terminal 19 is inputted to a waveform shaping circuit 26 and compared with a reference voltage from a reference voltage circuit 28 at a voltage comparator 27, and a waveform-shaped pulse is outputted from a terminal 29 with a delay time in response to the position of the slider 24.
JP56064270A 1981-04-30 1981-04-30 variable delay circuit Expired JPS5924566B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56064270A JPS5924566B2 (en) 1981-04-30 1981-04-30 variable delay circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56064270A JPS5924566B2 (en) 1981-04-30 1981-04-30 variable delay circuit

Publications (2)

Publication Number Publication Date
JPS57180228A true JPS57180228A (en) 1982-11-06
JPS5924566B2 JPS5924566B2 (en) 1984-06-11

Family

ID=13253341

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56064270A Expired JPS5924566B2 (en) 1981-04-30 1981-04-30 variable delay circuit

Country Status (1)

Country Link
JP (1) JPS5924566B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6051469A (en) * 1983-08-26 1985-03-22 Hitachi Ltd Power converter drive circuit
JPH02269478A (en) * 1989-01-14 1990-11-02 Danfoss As Inverter circuit and its control
US6121812A (en) * 1996-05-14 2000-09-19 Mitsubishi Denki Kabushiki Kaisha Delay circuit having delay time free from influence of operation environment
JP2015534342A (en) * 2012-09-14 2015-11-26 イテアシュぺぺ A substantially square high power pulse generator with adjustable slope.

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6051469A (en) * 1983-08-26 1985-03-22 Hitachi Ltd Power converter drive circuit
JPH02269478A (en) * 1989-01-14 1990-11-02 Danfoss As Inverter circuit and its control
US6121812A (en) * 1996-05-14 2000-09-19 Mitsubishi Denki Kabushiki Kaisha Delay circuit having delay time free from influence of operation environment
JP2015534342A (en) * 2012-09-14 2015-11-26 イテアシュぺぺ A substantially square high power pulse generator with adjustable slope.

Also Published As

Publication number Publication date
JPS5924566B2 (en) 1984-06-11

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