JPS57176732A - Positioning mechanism for integrated circuit - Google Patents

Positioning mechanism for integrated circuit

Info

Publication number
JPS57176732A
JPS57176732A JP5987781A JP5987781A JPS57176732A JP S57176732 A JPS57176732 A JP S57176732A JP 5987781 A JP5987781 A JP 5987781A JP 5987781 A JP5987781 A JP 5987781A JP S57176732 A JPS57176732 A JP S57176732A
Authority
JP
Japan
Prior art keywords
integrated circuit
guide
error
positioning mechanism
positioning
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5987781A
Other languages
Japanese (ja)
Inventor
Hiroyuki Watabe
Shoji Nagamachi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP5987781A priority Critical patent/JPS57176732A/en
Publication of JPS57176732A publication Critical patent/JPS57176732A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container

Abstract

PURPOSE:To accurately position an integrated circuit in a square integrated circuit by interposing the outer peripheral surface between two V-shaped grooves. CONSTITUTION:A stationary guide 5 and a movable guide 4 are spaced at an interval corresponding to the error produced by a conveyance via a pin 7 and a spring 6. When an integrated circuit 1 is set on upper positioning plates 3, 3' of the guide, force of F direction is applied by an air cylinder 8, a positioning plate holds the side of the integrated circuit for positioning it. The dimensional error of the integrated circuit body and other large setting error can be compensated by considering the gap length between the stationary guide and the movable guide.
JP5987781A 1981-04-22 1981-04-22 Positioning mechanism for integrated circuit Pending JPS57176732A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5987781A JPS57176732A (en) 1981-04-22 1981-04-22 Positioning mechanism for integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5987781A JPS57176732A (en) 1981-04-22 1981-04-22 Positioning mechanism for integrated circuit

Publications (1)

Publication Number Publication Date
JPS57176732A true JPS57176732A (en) 1982-10-30

Family

ID=13125813

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5987781A Pending JPS57176732A (en) 1981-04-22 1981-04-22 Positioning mechanism for integrated circuit

Country Status (1)

Country Link
JP (1) JPS57176732A (en)

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