JPS57168521A - Coder - Google Patents
CoderInfo
- Publication number
- JPS57168521A JPS57168521A JP5311181A JP5311181A JPS57168521A JP S57168521 A JPS57168521 A JP S57168521A JP 5311181 A JP5311181 A JP 5311181A JP 5311181 A JP5311181 A JP 5311181A JP S57168521 A JPS57168521 A JP S57168521A
- Authority
- JP
- Japan
- Prior art keywords
- output
- held
- input
- integrator
- coder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
PURPOSE:To obtain the stable characteristics in both the voiceless and voiced modes of an input analog signal, by adding a drift compensating circuit of a simple constitution to a feedback type coder to form a midtread type coder. CONSTITUTION:The input analog signal supplied to an input terminal 14 is sampled and held a sampling and holding circuit 1. This held voltage is supplied to an addition amplifier 2 and then led out through an output terminal 15 in the form of a PCM output. In case when a sequential feedback type coding circuit is turned into a bipolar coder of 4-bits, a positive side switch 12 is driven by a positive side detector 8 when the quantizing level of the PCM output emerging at the output of an FF6 is positioned at +2-+8. Thus the voltage held at an integrator 7 is discharged. When the quantizing level is set at -1--8, a negative side switch 13 is driven by a negative side detector 9 to charge the voltage held at the integrator 7. The output of the integrator 7 is applied to the input of the amplifier 2 to give a compensating control to the amplifier 2. As a result, the noise characteristics are obtained in good condition for the reproduced signal in the voiceless input mode.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5311181A JPS57168521A (en) | 1981-04-10 | 1981-04-10 | Coder |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5311181A JPS57168521A (en) | 1981-04-10 | 1981-04-10 | Coder |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57168521A true JPS57168521A (en) | 1982-10-16 |
Family
ID=12933679
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5311181A Pending JPS57168521A (en) | 1981-04-10 | 1981-04-10 | Coder |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57168521A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59183525A (en) * | 1983-04-01 | 1984-10-18 | Fujitsu Ltd | Analog-digital converting circuit |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55143855A (en) * | 1979-04-25 | 1980-11-10 | Fujitsu Ltd | Offset compensating circuit |
-
1981
- 1981-04-10 JP JP5311181A patent/JPS57168521A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55143855A (en) * | 1979-04-25 | 1980-11-10 | Fujitsu Ltd | Offset compensating circuit |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59183525A (en) * | 1983-04-01 | 1984-10-18 | Fujitsu Ltd | Analog-digital converting circuit |
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