JPS5767322A - Analogue-digital converting circuit provided with agc function - Google Patents

Analogue-digital converting circuit provided with agc function

Info

Publication number
JPS5767322A
JPS5767322A JP14385280A JP14385280A JPS5767322A JP S5767322 A JPS5767322 A JP S5767322A JP 14385280 A JP14385280 A JP 14385280A JP 14385280 A JP14385280 A JP 14385280A JP S5767322 A JPS5767322 A JP S5767322A
Authority
JP
Japan
Prior art keywords
converter
circuit
analogue
output
circuit provided
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14385280A
Other languages
Japanese (ja)
Inventor
Toshitaka Tsuda
Kazuo Murano
Shigeyuki Umigami
Noriaki Fujimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP14385280A priority Critical patent/JPS5767322A/en
Publication of JPS5767322A publication Critical patent/JPS5767322A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/18—Automatic control for modifying the range of signals the converter can handle, e.g. gain ranging

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE:To reduce the circuit scale and obtain a circuit form advantageous in respect to precision, by using a D/A converter for local decoding as a D/A converter for generating a reference voltage also. CONSTITUTION:When a control signal 1 is low-level, a switch 11 is connected to the (a) side. At this time, a 2 1 selector 16 selects the output of a peak or energy detecting circuit 17 and supplies it to a D/A converter 12 as a digital input. Next, when the signal 1 becomes a high level, the switch 11 is connected to the (b) side, and an output signal 4 of a sample hold circuit 18 is inputted as a full scale control signal 2 of the converter 12. At this time, the 2 1 selector 16 selects the output of an SAR (successive approximation resistor) circuit and supplies it to the converter as a digital input.
JP14385280A 1980-10-15 1980-10-15 Analogue-digital converting circuit provided with agc function Pending JPS5767322A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14385280A JPS5767322A (en) 1980-10-15 1980-10-15 Analogue-digital converting circuit provided with agc function

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14385280A JPS5767322A (en) 1980-10-15 1980-10-15 Analogue-digital converting circuit provided with agc function

Publications (1)

Publication Number Publication Date
JPS5767322A true JPS5767322A (en) 1982-04-23

Family

ID=15348453

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14385280A Pending JPS5767322A (en) 1980-10-15 1980-10-15 Analogue-digital converting circuit provided with agc function

Country Status (1)

Country Link
JP (1) JPS5767322A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01174123A (en) * 1987-12-28 1989-07-10 Alpine Electron Inc Automatic input/output characteristic adjusting method in a/d converter
EP0372548A2 (en) * 1988-12-07 1990-06-13 Fujitsu Limited Successive comparison type analog-to-digital converting apparatus
US5323331A (en) * 1990-03-06 1994-06-21 Siemens Aktiengesellschaft Method and circuit arrangement for level monitoring

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01174123A (en) * 1987-12-28 1989-07-10 Alpine Electron Inc Automatic input/output characteristic adjusting method in a/d converter
EP0372548A2 (en) * 1988-12-07 1990-06-13 Fujitsu Limited Successive comparison type analog-to-digital converting apparatus
US5323331A (en) * 1990-03-06 1994-06-21 Siemens Aktiengesellschaft Method and circuit arrangement for level monitoring

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