JPS57168323A - Data transmitting device - Google Patents

Data transmitting device

Info

Publication number
JPS57168323A
JPS57168323A JP56052948A JP5294881A JPS57168323A JP S57168323 A JPS57168323 A JP S57168323A JP 56052948 A JP56052948 A JP 56052948A JP 5294881 A JP5294881 A JP 5294881A JP S57168323 A JPS57168323 A JP S57168323A
Authority
JP
Japan
Prior art keywords
bus
data
answer
tsi
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56052948A
Other languages
Japanese (ja)
Other versions
JPS614137B2 (en
Inventor
Yasushi Fukunaga
Tadaaki Bando
Yoshinari Hiraoka
Hidekazu Matsumoto
Toshiyuki Ide
Tetsuya Kawakami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Engineering Co Ltd
Hitachi Ltd
Original Assignee
Hitachi Engineering Co Ltd
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Engineering Co Ltd, Hitachi Ltd filed Critical Hitachi Engineering Co Ltd
Priority to JP56052948A priority Critical patent/JPS57168323A/en
Priority to CA000400616A priority patent/CA1179069A/en
Priority to US06/366,785 priority patent/US4523272A/en
Priority to DE8282103065T priority patent/DE3267523D1/en
Priority to KR8201547A priority patent/KR880000462B1/en
Priority to EP82103065A priority patent/EP0063334B1/en
Publication of JPS57168323A publication Critical patent/JPS57168323A/en
Publication of JPS614137B2 publication Critical patent/JPS614137B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/36Handling requests for interconnection or transfer for access to common bus or bus system

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Bus Control (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Multi Processors (AREA)

Abstract

PURPOSE:To improve the throughput of a bus, by using a common bus for the address, data and answer buses respectively and occupying these buses individually with each processor and memory to perform the transmission of data. CONSTITUTION:Each of processors 12-1-12-N carries out the transfer of data to a memory 10 by using effectively an address bus 13, a data bus 14 and an answer bus 15 respectively in the form of a common bus. In this case, the three combinations are carried out at one time via the same time slot TS and with different buses among the data write request and its answer, the data read request and its answer and the data write and read requests respectively. The memory read request is fed from the processor 12-1 via the bus 13 with TSi+1; the memory write request is fed from the processor 12-2 via the buses 13 and 14 with TSi+1; and the answer of the TSi is sent back via the buses 14 and 15 with TSi+3 respectively. Furthermore the memory read request can be fed from the bus 13. The answer of TS1+1 is outputted via the bus 15 with TSi+4, and the memory write request is also possible.
JP56052948A 1981-04-10 1981-04-10 Data transmitting device Granted JPS57168323A (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP56052948A JPS57168323A (en) 1981-04-10 1981-04-10 Data transmitting device
CA000400616A CA1179069A (en) 1981-04-10 1982-04-07 Data transmission apparatus for a multiprocessor system
US06/366,785 US4523272A (en) 1981-04-10 1982-04-08 Bus selection control in a data transmission apparatus for a multiprocessor system
DE8282103065T DE3267523D1 (en) 1981-04-10 1982-04-08 Data processing apparatus for a multiprocessor system
KR8201547A KR880000462B1 (en) 1981-04-10 1982-04-08 Data transmission apparatus for a multiprocessor system
EP82103065A EP0063334B1 (en) 1981-04-10 1982-04-08 Data processing apparatus for a multiprocessor system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56052948A JPS57168323A (en) 1981-04-10 1981-04-10 Data transmitting device

Publications (2)

Publication Number Publication Date
JPS57168323A true JPS57168323A (en) 1982-10-16
JPS614137B2 JPS614137B2 (en) 1986-02-07

Family

ID=12929093

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56052948A Granted JPS57168323A (en) 1981-04-10 1981-04-10 Data transmitting device

Country Status (2)

Country Link
JP (1) JPS57168323A (en)
KR (1) KR880000462B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61292765A (en) * 1985-06-14 1986-12-23 Fujitsu Ltd Data transfer system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61292765A (en) * 1985-06-14 1986-12-23 Fujitsu Ltd Data transfer system

Also Published As

Publication number Publication date
KR880000462B1 (en) 1988-04-06
JPS614137B2 (en) 1986-02-07
KR840000126A (en) 1984-01-30

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