JPS57164551A - Lead-frame for semiconductor device - Google Patents

Lead-frame for semiconductor device

Info

Publication number
JPS57164551A
JPS57164551A JP56048784A JP4878481A JPS57164551A JP S57164551 A JPS57164551 A JP S57164551A JP 56048784 A JP56048784 A JP 56048784A JP 4878481 A JP4878481 A JP 4878481A JP S57164551 A JPS57164551 A JP S57164551A
Authority
JP
Japan
Prior art keywords
out leads
connecting member
lead
cut
leads
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56048784A
Other languages
Japanese (ja)
Inventor
Seiichi Gotou
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Yamagata Ltd
Original Assignee
NEC Yamagata Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Yamagata Ltd filed Critical NEC Yamagata Ltd
Priority to JP56048784A priority Critical patent/JPS57164551A/en
Publication of JPS57164551A publication Critical patent/JPS57164551A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To make electrical separation between respective drawing-out leads for sure by providing cut parts to connecting member between adjacent ones of a group of the drawing-out leads. CONSTITUTION:Cut parts 20 are provided to connecting member 14 between drawing-out leads 13 and 13' and the width of connecting member 14 is narrower there than that between groups of the drawing-out leads. Semiconductor chip are soldered to lead-frames 10 and bonded by wires. After that the drawing-out leads are immersed in solder plating bath with the connecting member 14 and external plating 19 is applied. Excess solder 19' stays in the cut part 20 of the connecting member 14 between the adjacent drawing-out leads and the drawing-out leads 13 are cut at the length l and separated from the connecting member 14. With this constitution, short-circuit by the excess solder 19' is avoided and the separation between the drawing-out leads is completed.
JP56048784A 1981-04-01 1981-04-01 Lead-frame for semiconductor device Pending JPS57164551A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56048784A JPS57164551A (en) 1981-04-01 1981-04-01 Lead-frame for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56048784A JPS57164551A (en) 1981-04-01 1981-04-01 Lead-frame for semiconductor device

Publications (1)

Publication Number Publication Date
JPS57164551A true JPS57164551A (en) 1982-10-09

Family

ID=12812866

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56048784A Pending JPS57164551A (en) 1981-04-01 1981-04-01 Lead-frame for semiconductor device

Country Status (1)

Country Link
JP (1) JPS57164551A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60146350U (en) * 1984-03-07 1985-09-28 日本電気株式会社 Lead frame for semiconductor devices

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60146350U (en) * 1984-03-07 1985-09-28 日本電気株式会社 Lead frame for semiconductor devices

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