JPS57162185A - Sample holding circuit - Google Patents
Sample holding circuitInfo
- Publication number
- JPS57162185A JPS57162185A JP56047687A JP4768781A JPS57162185A JP S57162185 A JPS57162185 A JP S57162185A JP 56047687 A JP56047687 A JP 56047687A JP 4768781 A JP4768781 A JP 4768781A JP S57162185 A JPS57162185 A JP S57162185A
- Authority
- JP
- Japan
- Prior art keywords
- series circuits
- holding
- voltage
- analog
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
- G11C27/02—Sample-and-hold arrangements
- G11C27/024—Sample-and-hold arrangements using a capacitive memory element
- G11C27/026—Sample-and-hold arrangements using a capacitive memory element associated with an amplifier
Landscapes
- Analogue/Digital Conversion (AREA)
Abstract
PURPOSE:To reduce the influence of an aperture jitter by connecting in parallel the N stages of series circuits each of which consists of a buffer amplifier, an analog gate switch and a holding capacitor and applying the same analog input signal to these series circuits simultaneously to find the additional average of the output voltage of the series circuits. CONSTITUTION:Three stage of series circuits 11, 12, 13 each of which consists of an input buffer amplifier 2, an analog gate switch and a holding capacitor 4 are provided in parallel. The input sides of these series circuis 11, 12, 13 are connected to a common input terminal 1 and respective analog gate switches 3 are controlled by a pulse outputted from a common control pulse input terminal 7. The outputs from the series circuits 11, 12, 13, those are analog voltage held in respective holding capacitors 4, are added in an adder 14 and the average output obtained by dividing the added value by 3 is applied to an output terminal 6. Where, holding voltage of respective holding capacitors 4 are V+Vi<1>, V+Vi<2>i<2> and V+Vi<3>, the holding voltage without aperture jitter is V, respective error voltage due to the aperture jitter are Vi<1>, Vi<2>, Vi<3>i<3>, and the integer is 1.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56047687A JPS57162185A (en) | 1981-03-30 | 1981-03-30 | Sample holding circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56047687A JPS57162185A (en) | 1981-03-30 | 1981-03-30 | Sample holding circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57162185A true JPS57162185A (en) | 1982-10-05 |
JPS6131560B2 JPS6131560B2 (en) | 1986-07-21 |
Family
ID=12782188
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56047687A Granted JPS57162185A (en) | 1981-03-30 | 1981-03-30 | Sample holding circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57162185A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0506344A2 (en) * | 1991-03-25 | 1992-09-30 | Sharp Kabushiki Kaisha | Sample-and-hold circuit |
DE4236947A1 (en) * | 1992-11-02 | 1994-05-05 | Krohne Messtechnik Kg | Sample=and=hold circuit with low pass filter - has additional switching element integrated in filter for which output voltage is constant when open and equal to last value when closed |
EP1043839A2 (en) * | 1999-04-08 | 2000-10-11 | Texas Instruments Incorporated | Reduction of aperture distortion in parallel A/D converters |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62174765U (en) * | 1986-04-01 | 1987-11-06 |
-
1981
- 1981-03-30 JP JP56047687A patent/JPS57162185A/en active Granted
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0506344A2 (en) * | 1991-03-25 | 1992-09-30 | Sharp Kabushiki Kaisha | Sample-and-hold circuit |
DE4236947A1 (en) * | 1992-11-02 | 1994-05-05 | Krohne Messtechnik Kg | Sample=and=hold circuit with low pass filter - has additional switching element integrated in filter for which output voltage is constant when open and equal to last value when closed |
EP1043839A2 (en) * | 1999-04-08 | 2000-10-11 | Texas Instruments Incorporated | Reduction of aperture distortion in parallel A/D converters |
EP1043839A3 (en) * | 1999-04-08 | 2003-06-18 | Texas Instruments Incorporated | Reduction of aperture distortion in parallel A/D converters |
Also Published As
Publication number | Publication date |
---|---|
JPS6131560B2 (en) | 1986-07-21 |
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