JPS57161959A - Control system for storage device - Google Patents

Control system for storage device

Info

Publication number
JPS57161959A
JPS57161959A JP4708381A JP4708381A JPS57161959A JP S57161959 A JPS57161959 A JP S57161959A JP 4708381 A JP4708381 A JP 4708381A JP 4708381 A JP4708381 A JP 4708381A JP S57161959 A JPS57161959 A JP S57161959A
Authority
JP
Japan
Prior art keywords
address
register
addresses
data
storage device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4708381A
Other languages
Japanese (ja)
Inventor
Osamu Araya
Haruki Matsui
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP4708381A priority Critical patent/JPS57161959A/en
Publication of JPS57161959A publication Critical patent/JPS57161959A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0215Addressing or allocation; Relocation with look ahead addressing means

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Indexing, Searching, Synchronizing, And The Amount Of Synchronization Travel Of Record Carriers (AREA)

Abstract

PURPOSE:To shorten the latency time till the access completion, by executing the access to plural addresses from the address nearest to the current address of a storage device. CONSTITUTION:When an address pointer 4 indicates an address A3 and data is requested to addresses A10, A3, A4, and A7 in order from an information processing device 3, these addresses are stored in address registers 6, and a control part 5 compares addresses with the address indicated by the address pointer 4. The address A4 for which the latency time is shortest is sent to a driver part 8, and data in this address is read out from a storage device 9 and is stored in a data register 7 corresponding to the address register 6 where the address A4 is stored. Simultaneously, the register 6 is made empty, and the access end is reported from the control part 5 to the device 3, and data sent from the register 7 is taken into the device 3.
JP4708381A 1981-03-30 1981-03-30 Control system for storage device Pending JPS57161959A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4708381A JPS57161959A (en) 1981-03-30 1981-03-30 Control system for storage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4708381A JPS57161959A (en) 1981-03-30 1981-03-30 Control system for storage device

Publications (1)

Publication Number Publication Date
JPS57161959A true JPS57161959A (en) 1982-10-05

Family

ID=12765274

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4708381A Pending JPS57161959A (en) 1981-03-30 1981-03-30 Control system for storage device

Country Status (1)

Country Link
JP (1) JPS57161959A (en)

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