JPS57158832A - Image memory device - Google Patents

Image memory device

Info

Publication number
JPS57158832A
JPS57158832A JP56044812A JP4481281A JPS57158832A JP S57158832 A JPS57158832 A JP S57158832A JP 56044812 A JP56044812 A JP 56044812A JP 4481281 A JP4481281 A JP 4481281A JP S57158832 A JPS57158832 A JP S57158832A
Authority
JP
Japan
Prior art keywords
light
information
panel
eliminating
bias
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56044812A
Other languages
Japanese (ja)
Inventor
Noriaki Tsukada
Takashi Nakayama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP56044812A priority Critical patent/JPS57158832A/en
Publication of JPS57158832A publication Critical patent/JPS57158832A/en
Pending legal-status Critical Current

Links

Landscapes

  • Electrochromic Elements, Electrophoresis, Or Variable Reflection Or Absorption Elements (AREA)
  • Optical Recording Or Reproduction (AREA)

Abstract

PURPOSE:To write information by irradiating both information light and bias light to an image memory panel obtd. by arranging optically finally stable elements in the form of a matrix, to conduct reproduction by irradiating only bias light, and to erase the information by eliminating the bias light. CONSTITUTION:A GaAs layer 1 having about 1-5mum thickness and GaAlAs layers 2 having about 0.1-0.5mum thickness are formed on a GaAs substrate 4 by epitaxial growth, the substrate 4 is selectively etched in the form of a matrix, and dielectric reflecting films 3 are attached to both sides of the panel to fabricate an image memory panel 10. The level of bias light 12 is regulated to a level where 2 stable output light conditions exist to certain input light. The part of the panel 10 irradiated with both information light 11 passed through an image information plate 7 and bias light 12 has an increased quantity of output light, and this state is maintained even after eliminating the light 11. After the information is erased by eliminating the remaining light 12, recording can be repeated in a similar process.
JP56044812A 1981-03-27 1981-03-27 Image memory device Pending JPS57158832A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56044812A JPS57158832A (en) 1981-03-27 1981-03-27 Image memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56044812A JPS57158832A (en) 1981-03-27 1981-03-27 Image memory device

Publications (1)

Publication Number Publication Date
JPS57158832A true JPS57158832A (en) 1982-09-30

Family

ID=12701836

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56044812A Pending JPS57158832A (en) 1981-03-27 1981-03-27 Image memory device

Country Status (1)

Country Link
JP (1) JPS57158832A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5999855A (en) * 1982-11-29 1984-06-08 Nec Corp Time division optical exchange
JPS59107675A (en) * 1982-12-10 1984-06-21 Nec Corp Time division optical exchange
JPS59116624A (en) * 1982-12-23 1984-07-05 Toshiba Corp Photoelectric interface circuit
JPH01112225A (en) * 1987-10-23 1989-04-28 Nec Corp Optical arithmetic unit
JPH01164930A (en) * 1987-12-21 1989-06-29 Nippon Telegr & Teleph Corp <Ntt> Optical register memory array

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5999855A (en) * 1982-11-29 1984-06-08 Nec Corp Time division optical exchange
JPS59107675A (en) * 1982-12-10 1984-06-21 Nec Corp Time division optical exchange
JPH0439837B2 (en) * 1982-12-10 1992-06-30
JPS59116624A (en) * 1982-12-23 1984-07-05 Toshiba Corp Photoelectric interface circuit
JPH01112225A (en) * 1987-10-23 1989-04-28 Nec Corp Optical arithmetic unit
JPH01164930A (en) * 1987-12-21 1989-06-29 Nippon Telegr & Teleph Corp <Ntt> Optical register memory array

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