JPS57157627A - Offset compensating system for code converting circuit - Google Patents
Offset compensating system for code converting circuitInfo
- Publication number
- JPS57157627A JPS57157627A JP4222681A JP4222681A JPS57157627A JP S57157627 A JPS57157627 A JP S57157627A JP 4222681 A JP4222681 A JP 4222681A JP 4222681 A JP4222681 A JP 4222681A JP S57157627 A JPS57157627 A JP S57157627A
- Authority
- JP
- Japan
- Prior art keywords
- impressed
- integrator
- converter
- converting circuit
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
PURPOSE:To compensate the offset of an encoder, by adding the output of the encoder to a decoder through an integrator during the period where the D/A converter of the decoder is not used. CONSTITUTION:During a period where a D/A converter 10 which makes a sampling action at every sampling cycle T does not work, a digital signal outputted from a logic circuit is impressed upon the D/A converter 10. When the digital signal is impressed, the D/A converter outputs an analog signal obtained by making a D/A conversion on the digital signal from the logic circuit 3, and the analog signal is impressed upon an integrator 12. The integrator 12 is configured in such a way that it has a time constant which is sufficiently longer than the sampling cycle T, and the output signal of the integrator 12 is impressed upon a comparator 2 as a signal to be used for offset compensation.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4222681A JPS57157627A (en) | 1981-03-23 | 1981-03-23 | Offset compensating system for code converting circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4222681A JPS57157627A (en) | 1981-03-23 | 1981-03-23 | Offset compensating system for code converting circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57157627A true JPS57157627A (en) | 1982-09-29 |
Family
ID=12630111
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4222681A Pending JPS57157627A (en) | 1981-03-23 | 1981-03-23 | Offset compensating system for code converting circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57157627A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6087525A (en) * | 1983-10-20 | 1985-05-17 | Yamatake Honeywell Co Ltd | Analog digital conversion circuit |
JPS6449323A (en) * | 1987-08-20 | 1989-02-23 | Pioneer Electronic Corp | Off-set compensating circuit |
-
1981
- 1981-03-23 JP JP4222681A patent/JPS57157627A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6087525A (en) * | 1983-10-20 | 1985-05-17 | Yamatake Honeywell Co Ltd | Analog digital conversion circuit |
JPS6449323A (en) * | 1987-08-20 | 1989-02-23 | Pioneer Electronic Corp | Off-set compensating circuit |
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