JPS57150188A - Asynchronous type static memory - Google Patents

Asynchronous type static memory

Info

Publication number
JPS57150188A
JPS57150188A JP56035791A JP3579181A JPS57150188A JP S57150188 A JPS57150188 A JP S57150188A JP 56035791 A JP56035791 A JP 56035791A JP 3579181 A JP3579181 A JP 3579181A JP S57150188 A JPS57150188 A JP S57150188A
Authority
JP
Japan
Prior art keywords
lines
trs
static memory
power supply
clock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56035791A
Other languages
Japanese (ja)
Other versions
JPS6051194B2 (en
Inventor
Hideaki Ito
Atsushi Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56035791A priority Critical patent/JPS6051194B2/en
Publication of JPS57150188A publication Critical patent/JPS57150188A/en
Publication of JPS6051194B2 publication Critical patent/JPS6051194B2/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/419Read-write [R-W] circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)

Abstract

PURPOSE:To achieve equi-potential for data bus of an asynchronous static memory in a high speed in a small current consumption, by providing a short circuit with a pair of data bus lines and connecting the bus lines to a low potential power supply for a short time. CONSTITUTION:A pair of bit lines DB and anti-DB' of an asynchronous static memory are provided with a short circuit ST consisting of P type transistors (TRs) P1-P3 connecting both the lines and gate N type TRs N5 and N6 connecting the bit lines to a low potential power supply VSS. The TRs P1-P3 are controlled with a chip selection clock CS1 and the TRS N5 and N6 are controlled with a clock CS2 delayed for a prescribed amount from the clock CS1. Thus, they are connected to the power supply VSS only at a part of period of the standby period and the lines are of equal potential in high speed with a small power consumption. Then, the access at chip selection is made high in speed.
JP56035791A 1981-03-12 1981-03-12 Asynchronous static memory Expired JPS6051194B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56035791A JPS6051194B2 (en) 1981-03-12 1981-03-12 Asynchronous static memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56035791A JPS6051194B2 (en) 1981-03-12 1981-03-12 Asynchronous static memory

Publications (2)

Publication Number Publication Date
JPS57150188A true JPS57150188A (en) 1982-09-16
JPS6051194B2 JPS6051194B2 (en) 1985-11-12

Family

ID=12451733

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56035791A Expired JPS6051194B2 (en) 1981-03-12 1981-03-12 Asynchronous static memory

Country Status (1)

Country Link
JP (1) JPS6051194B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0166540A2 (en) * 1984-05-30 1986-01-02 Fujitsu Limited A semiconductor memory device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0166540A2 (en) * 1984-05-30 1986-01-02 Fujitsu Limited A semiconductor memory device
US4656608A (en) * 1984-05-30 1987-04-07 Fujitsu Limited Semiconductor memory device

Also Published As

Publication number Publication date
JPS6051194B2 (en) 1985-11-12

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