JPS57145493A - Digital convergence compensator - Google Patents
Digital convergence compensatorInfo
- Publication number
- JPS57145493A JPS57145493A JP3183881A JP3183881A JPS57145493A JP S57145493 A JPS57145493 A JP S57145493A JP 3183881 A JP3183881 A JP 3183881A JP 3183881 A JP3183881 A JP 3183881A JP S57145493 A JPS57145493 A JP S57145493A
- Authority
- JP
- Japan
- Prior art keywords
- degree
- convergence
- compensation
- shift
- control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N9/00—Details of colour television systems
- H04N9/12—Picture reproducers
- H04N9/16—Picture reproducers using cathode ray tubes
- H04N9/28—Arrangements for convergence or focusing
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Video Image Reproduction Devices For Color Tv Systems (AREA)
Abstract
PURPOSE:To shorten the time of control for the writing correction of the degree of compensation, by changing the degree of compensation roughly when the shift of convergence is large and changing the degree of compensation by 1 when the shift of convergence is small respectively. CONSTITUTION:A control point to which the convergence compensation is desired is selected by a cursor key 2 on a control panel 1, and then the selected control point is displayed on a TV screen. At the same time, data A on the degree of compensation of convergence is taken into a register 21. In case the shift of convergence is large, a high-speed mode of control is selected by a mode switch 20 on the panel 1. Then an operation is carried out by a writing key 3 while looking at the screen, and as a result an N setting circuit 22 to which the compensating degree N (N>1) is previously set is selected. Then the data A is added to the degree N through an adder circuit 27 and written into a memory 5. The above-mentioned operation is repeated. When the shift of convergence becomes small, a low-soeed mode is selected with the switch 20 with an operation of the key 3. Thus a 1 setting circuit 23 is selected to correct the compensating degree by 1.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3183881A JPS57145493A (en) | 1981-03-04 | 1981-03-04 | Digital convergence compensator |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3183881A JPS57145493A (en) | 1981-03-04 | 1981-03-04 | Digital convergence compensator |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57145493A true JPS57145493A (en) | 1982-09-08 |
Family
ID=12342193
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3183881A Pending JPS57145493A (en) | 1981-03-04 | 1981-03-04 | Digital convergence compensator |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57145493A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02283188A (en) * | 1989-04-25 | 1990-11-20 | Sharp Corp | Digital convergence correction device |
-
1981
- 1981-03-04 JP JP3183881A patent/JPS57145493A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02283188A (en) * | 1989-04-25 | 1990-11-20 | Sharp Corp | Digital convergence correction device |
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