JPS57141161A - Detector for digital information - Google Patents
Detector for digital informationInfo
- Publication number
- JPS57141161A JPS57141161A JP56027345A JP2734581A JPS57141161A JP S57141161 A JPS57141161 A JP S57141161A JP 56027345 A JP56027345 A JP 56027345A JP 2734581 A JP2734581 A JP 2734581A JP S57141161 A JPS57141161 A JP S57141161A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- clamping
- clock signal
- frequency range
- shaping
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/06—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
- H04L25/061—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of dc offset
- H04L25/063—Setting decision thresholds using feedback techniques only
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
- Manipulation Of Pulses (AREA)
- Dc Digital Transmission (AREA)
Abstract
PURPOSE:To reduce errors in detecting a modulated signal which contains low frequency range components, by holding and shaping a signal passed through a clamping circuit and a comparing circuit, with a clock signal which synchronizes with the output of the comparing circuit. CONSTITUTION:Through a transmission line which causes the deterioration of DC components and low-frequency range components, data is transmitted by a modulation system, such as NRZ, which allows the low frequency range component to be included. A signal to be detected is supplied to a comparator 21 through a clamping device 20 to be compared with a reference voltage 22. The output signal of the comparator 21 is supplied to a clock signal generator 23 and a shaping device 24 composed of a DFF to be shaped by the shaping device with a clock signal which synchronizes with a transmitted train of data. The output signal of the shaping device 24 is applied to a demodulator and also to a clamping pulse generator 26 together with the clock signal, thereby generating clamping pulse which control the clamping device 20.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56027345A JPS57141161A (en) | 1981-02-25 | 1981-02-25 | Detector for digital information |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56027345A JPS57141161A (en) | 1981-02-25 | 1981-02-25 | Detector for digital information |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57141161A true JPS57141161A (en) | 1982-09-01 |
JPH037176B2 JPH037176B2 (en) | 1991-01-31 |
Family
ID=12218451
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56027345A Granted JPS57141161A (en) | 1981-02-25 | 1981-02-25 | Detector for digital information |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57141161A (en) |
-
1981
- 1981-02-25 JP JP56027345A patent/JPS57141161A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPH037176B2 (en) | 1991-01-31 |
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