GB1343142A - Automatic frequency control - Google Patents

Automatic frequency control


Publication number
GB1343142A GB2160471A GB2160471A GB1343142A GB 1343142 A GB1343142 A GB 1343142A GB 2160471 A GB2160471 A GB 2160471A GB 2160471 A GB2160471 A GB 2160471A GB 1343142 A GB1343142 A GB 1343142A
United Kingdom
Prior art keywords
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to JP1271070A priority Critical patent/JPS4934005B1/ja
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Publication of GB1343142A publication Critical patent/GB1343142A/en
Expired legal-status Critical Current



    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop


1343142 Automatic frequency control, frequency comparators MATSUSHITA ELECTRIC INDUSTRIAL CO Ltd 19 April 1971 [13 Feb 1970 (3) 9 March 1970 3 Sept 1970] 21604/71 Heading H3A In an automatic frequency control system, the controlled and reference signals F, S 0 are fed to a frequency comparator which produces a positive or negative a.f.c. pulse signal on one or other of two output terminals depending on whether F > S 0 or F < S 0 , the width of the pulses depending on the frequency difference. In the arrangement of Fig. 1, a sync. signal S 0 and a flyback signal F to be synchronized are shaped by inverters 3, 4, 5 to provide trains of positive going rectangular pulses S<SP>11</SP>, F<SP>1</SP>, Fig. 2, which are fed to NOR gates 8, 9 to produce signal X. The signal S<SP>11</SP> is also inverted at 6 and integrated at 7 to provide a signal S<SP>111</SP>1 which is fed together with the signal X to AND gate 10 which produces an output Y if an S<SP>11</SP> pulse leads an F<SP>1</SP> pulse. The X signal is also fed to gate 13 which inhibits passage of the signal X to output Z whenever an output Y exists. If an F<SP>1</SP> pulse leads an S<SP>11</SP> pulse, no Y output is produced to gate 13 is opened to give a Z output. Phase coincidence of F<SP>1</SP> and S<SP>11</SP> produces no X signal and hence no output occurs on either Y or Z. The lines Y, Z are connected to an integrator, Fig. 3, which provides the control signal and which has a variable time constant controlled by a signal P from Fig. 1. This signal P is applied to a peak detector 17 to provide a switching voltage for diode D 4 which switches R 3 C 3 in or out of circuit depending on the presence or absence of P. Figs. 5, 6 relate to a modification of the discriminator of Figs. 1, 2 which functions in a similar manner, but which employs a different arrangement of gates.
GB2160471A 1970-02-13 1971-04-19 Automatic frequency control Expired GB1343142A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1271070A JPS4934005B1 (en) 1970-02-13 1970-02-13

Publications (1)

Publication Number Publication Date
GB1343142A true GB1343142A (en) 1974-01-10



Family Applications (1)

Application Number Title Priority Date Filing Date
GB2160471A Expired GB1343142A (en) 1970-02-13 1971-04-19 Automatic frequency control

Country Status (2)

Country Link
JP (1) JPS4934005B1 (en)
GB (1) GB1343142A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0460501U (en) * 1990-10-02 1992-05-25

Also Published As

Publication number Publication date
JPS4934005B1 (en) 1974-09-11

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Legal Events

Date Code Title Description
PS Patent sealed
746 Register noted 'licences of right' (sect. 46/1977)
PCNP Patent ceased through non-payment of renewal fee