JPS57136820A - Semiconductor logical circuit - Google Patents

Semiconductor logical circuit

Info

Publication number
JPS57136820A
JPS57136820A JP57004369A JP436982A JPS57136820A JP S57136820 A JPS57136820 A JP S57136820A JP 57004369 A JP57004369 A JP 57004369A JP 436982 A JP436982 A JP 436982A JP S57136820 A JPS57136820 A JP S57136820A
Authority
JP
Japan
Prior art keywords
reference voltage
terminal
source
logical amplitude
logical circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57004369A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6126252B2 (enrdf_load_stackoverflow
Inventor
Hiromichi Kimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP57004369A priority Critical patent/JPS57136820A/ja
Publication of JPS57136820A publication Critical patent/JPS57136820A/ja
Publication of JPS6126252B2 publication Critical patent/JPS6126252B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/018—Coupling arrangements; Interface arrangements using bipolar transistors only
    • H03K19/01806—Interface arrangements
    • H03K19/01812—Interface arrangements with at least one differential stage

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Logic Circuits (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
JP57004369A 1982-01-14 1982-01-14 Semiconductor logical circuit Granted JPS57136820A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57004369A JPS57136820A (en) 1982-01-14 1982-01-14 Semiconductor logical circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57004369A JPS57136820A (en) 1982-01-14 1982-01-14 Semiconductor logical circuit

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP47044072A Division JPS597247B2 (ja) 1972-05-01 1972-05-01 半導体論理回路

Publications (2)

Publication Number Publication Date
JPS57136820A true JPS57136820A (en) 1982-08-24
JPS6126252B2 JPS6126252B2 (enrdf_load_stackoverflow) 1986-06-19

Family

ID=11582450

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57004369A Granted JPS57136820A (en) 1982-01-14 1982-01-14 Semiconductor logical circuit

Country Status (1)

Country Link
JP (1) JPS57136820A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60142619A (ja) * 1983-12-28 1985-07-27 Fujitsu Ltd 半導体集積回路

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60142619A (ja) * 1983-12-28 1985-07-27 Fujitsu Ltd 半導体集積回路

Also Published As

Publication number Publication date
JPS6126252B2 (enrdf_load_stackoverflow) 1986-06-19

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