JPS57134941A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS57134941A
JPS57134941A JP1964181A JP1964181A JPS57134941A JP S57134941 A JPS57134941 A JP S57134941A JP 1964181 A JP1964181 A JP 1964181A JP 1964181 A JP1964181 A JP 1964181A JP S57134941 A JPS57134941 A JP S57134941A
Authority
JP
Japan
Prior art keywords
terminal
terminals
measurement
making
point position
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1964181A
Other languages
Japanese (ja)
Inventor
Hiroyuki Misawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP1964181A priority Critical patent/JPS57134941A/en
Publication of JPS57134941A publication Critical patent/JPS57134941A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05553—Shape in top view being rectangular
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601—Structure
    • H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To improve accuracy of measurement in a function test effectively utilizing a limited number of external terminals by making at least one of a large number of terminals bigger than the others. CONSTITUTION:A terminal 5 for external connection is made 200mumX100mum large extending to a limit leaving 50mum spaces to adjacent terminals allowed by fabrication work while terminals 4 and 6 are 100mumX100mum in size. A distance between the centers of each terminal is kept at 200mum considering the fabrication allowance. A detector point position 25 of the terminal is used for current supply and measurement while a detector point position 26 for voltage measurement thus making it possible to accurately measure the potential of the terminal 5 and to use the terminal 6 for output for other purposes.
JP1964181A 1981-02-13 1981-02-13 Semiconductor device Pending JPS57134941A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1964181A JPS57134941A (en) 1981-02-13 1981-02-13 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1964181A JPS57134941A (en) 1981-02-13 1981-02-13 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS57134941A true JPS57134941A (en) 1982-08-20

Family

ID=12004846

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1964181A Pending JPS57134941A (en) 1981-02-13 1981-02-13 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS57134941A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0346246A (en) * 1989-07-14 1991-02-27 Tokyo Electron Ltd Inspecting device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS523384A (en) * 1975-06-24 1977-01-11 Siemens Ag Comb teeth shaped conductor for semiconductor elements or integrated circuits

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS523384A (en) * 1975-06-24 1977-01-11 Siemens Ag Comb teeth shaped conductor for semiconductor elements or integrated circuits

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0346246A (en) * 1989-07-14 1991-02-27 Tokyo Electron Ltd Inspecting device

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