JPS57132472A - Video information display controller - Google Patents

Video information display controller

Info

Publication number
JPS57132472A
JPS57132472A JP56017689A JP1768981A JPS57132472A JP S57132472 A JPS57132472 A JP S57132472A JP 56017689 A JP56017689 A JP 56017689A JP 1768981 A JP1768981 A JP 1768981A JP S57132472 A JPS57132472 A JP S57132472A
Authority
JP
Japan
Prior art keywords
memory
video information
circuit
video signal
controlling circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56017689A
Other languages
Japanese (ja)
Other versions
JPS6359579B2 (en
Inventor
Shigeru Fukuoka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56017689A priority Critical patent/JPS57132472A/en
Publication of JPS57132472A publication Critical patent/JPS57132472A/en
Publication of JPS6359579B2 publication Critical patent/JPS6359579B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/04—Scanning arrangements, i.e. arrangements for the displacement of active reading or reproducing elements relative to the original or reproducing medium, or vice versa

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Facsimiles In General (AREA)
  • Facsimile Image Signal Circuits (AREA)

Abstract

PURPOSE:To achieve detailed display of facsimile video information and display keeping similarity with a transmission original, by providing a line memory, a picture memory, a similar address controlling circuit and a one-bit video signal synthesis circuit. CONSTITUTION:Facsimile video information is inputted to a line memory write- in controlling circuit 1 and written in a line memory 2. The video information per one line written in the memory 2 is written in a picture memory 4 via a data bus controlling circuit 3. The content of the memory 4 is read out so that the display to a display device is similar to a facsimile transmission original with a readout address generated at a similar address controlling circuit 17. For this readout jump scanning control of TV is made, and the signal is edited into a composite video signal by taking one dot as one spot at a one dot video signal synthesizing circuit 7 and transmitted from a video signal output circuit 6.
JP56017689A 1981-02-09 1981-02-09 Video information display controller Granted JPS57132472A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56017689A JPS57132472A (en) 1981-02-09 1981-02-09 Video information display controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56017689A JPS57132472A (en) 1981-02-09 1981-02-09 Video information display controller

Publications (2)

Publication Number Publication Date
JPS57132472A true JPS57132472A (en) 1982-08-16
JPS6359579B2 JPS6359579B2 (en) 1988-11-21

Family

ID=11950785

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56017689A Granted JPS57132472A (en) 1981-02-09 1981-02-09 Video information display controller

Country Status (1)

Country Link
JP (1) JPS57132472A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104318892A (en) * 2014-09-29 2015-01-28 西安交通大学 Scanning logic control method and apparatus in OLED digital driving

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104318892A (en) * 2014-09-29 2015-01-28 西安交通大学 Scanning logic control method and apparatus in OLED digital driving
CN104318892B (en) * 2014-09-29 2016-08-17 西安交通大学 Scanning logic control method in a kind of OLED digital drive and device

Also Published As

Publication number Publication date
JPS6359579B2 (en) 1988-11-21

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