JPS57130467A - Flush type charge transfer device - Google Patents

Flush type charge transfer device

Info

Publication number
JPS57130467A
JPS57130467A JP1615981A JP1615981A JPS57130467A JP S57130467 A JPS57130467 A JP S57130467A JP 1615981 A JP1615981 A JP 1615981A JP 1615981 A JP1615981 A JP 1615981A JP S57130467 A JPS57130467 A JP S57130467A
Authority
JP
Japan
Prior art keywords
substrate
regions
signal charge
depth
transition
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1615981A
Other languages
Japanese (ja)
Other versions
JPS6313349B2 (en
Inventor
Mototsugu Ogura
Mitsuo Nakayama
Yasuaki Terui
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP1615981A priority Critical patent/JPS57130467A/en
Publication of JPS57130467A publication Critical patent/JPS57130467A/en
Publication of JPS6313349B2 publication Critical patent/JPS6313349B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/762Charge transfer devices
    • H01L29/765Charge-coupled devices
    • H01L29/768Charge-coupled devices with field effect produced by an insulated gate
    • H01L29/76866Surface Channel CCD

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

PURPOSE:To increase the quantity of transfer signal charge, and to make the titled device proper to a small-sized image sensor by forming the position of the end section of a depletion layer when viewed in the depth direction from the interface of a substrate so that a transition region is deepened more than a storage region in the flush type CCD. CONSTITUTION:Phosphorus ions are implanted in the substrate such as a P type substrate 1, the substrate is thermally treated for a long time, and the N<-> transition regions 14 are shaped, and As is injected and the N<+> storage regions 15 are formed. Gate electrodes 3', 4' consisting of poly Si and wiring 3, 4 for applying clock voltage are shaped onto the substrate structure through a gate film 2, and the CCD is molded. The depth 16 of the junctions of the regions 14 is set to approximately 0.8mum and the depth 17 of the regions 15 to approximately 0.3mum. Accordingly, the potential profiles in the depth direction of the transition regions 14 can be formed in shapes that their gradients are gentle (the left-over of loading is difficult to be formed when the quantity of signal charge is increased). Consequently, the maximum quantity of signal charge can be augmented, and the device having a wide dynamic range and excellent S/N can be manufactured.
JP1615981A 1981-02-04 1981-02-04 Flush type charge transfer device Granted JPS57130467A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1615981A JPS57130467A (en) 1981-02-04 1981-02-04 Flush type charge transfer device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1615981A JPS57130467A (en) 1981-02-04 1981-02-04 Flush type charge transfer device

Publications (2)

Publication Number Publication Date
JPS57130467A true JPS57130467A (en) 1982-08-12
JPS6313349B2 JPS6313349B2 (en) 1988-03-25

Family

ID=11908721

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1615981A Granted JPS57130467A (en) 1981-02-04 1981-02-04 Flush type charge transfer device

Country Status (1)

Country Link
JP (1) JPS57130467A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5073578A (en) * 1973-10-30 1975-06-17
JPS5181068U (en) * 1974-12-20 1976-06-28

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5073578A (en) * 1973-10-30 1975-06-17
JPS5181068U (en) * 1974-12-20 1976-06-28

Also Published As

Publication number Publication date
JPS6313349B2 (en) 1988-03-25

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