JPS57127395A - Channel memory switching system - Google Patents

Channel memory switching system

Info

Publication number
JPS57127395A
JPS57127395A JP1226881A JP1226881A JPS57127395A JP S57127395 A JPS57127395 A JP S57127395A JP 1226881 A JP1226881 A JP 1226881A JP 1226881 A JP1226881 A JP 1226881A JP S57127395 A JPS57127395 A JP S57127395A
Authority
JP
Japan
Prior art keywords
channel
memory
block
fault
channel memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1226881A
Other languages
Japanese (ja)
Inventor
Hiyoshi Goto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TAIKOU DENKI SEISAKUSHO KK
Taiko Electric Works Ltd
Original Assignee
TAIKOU DENKI SEISAKUSHO KK
Taiko Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TAIKOU DENKI SEISAKUSHO KK, Taiko Electric Works Ltd filed Critical TAIKOU DENKI SEISAKUSHO KK
Priority to JP1226881A priority Critical patent/JPS57127395A/en
Publication of JPS57127395A publication Critical patent/JPS57127395A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)

Abstract

PURPOSE:To ensure the switching to a spare channel memory in case a using channel system has a fault, by providing a using channel memory block having the prescribed capacity for connection of the channel plus a spare channel memory block having an interger-fold capacity as much as the using memory block. CONSTITUTION:An address corresponding to each channel of a channel memory 1 is cyclically designed by a channel memory control circuit 4. The voice data given from an incoming highway 2 is stored in a memory 1, and the voice data of the address of the remote calling side designated to the circuit 4 is transmitted to an outgoing highway 3 from a central controller 5. For the memory 1, the channel memory blocks corresponding to the number of channels of the highways 2 and 3 is defined as a block and plural units of such block are provided to ensure a redundant constitution of both the using and spare blocks. In case a call has some fault due to a fault of the channel system, a memory block switch ing circuit 6 switches the using block of the memory 1 to the spare channel memory block by an indication given from the controller 5. After this the change of the calling state is monitored to facilitate an easy decision of the fault.
JP1226881A 1981-01-29 1981-01-29 Channel memory switching system Pending JPS57127395A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1226881A JPS57127395A (en) 1981-01-29 1981-01-29 Channel memory switching system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1226881A JPS57127395A (en) 1981-01-29 1981-01-29 Channel memory switching system

Publications (1)

Publication Number Publication Date
JPS57127395A true JPS57127395A (en) 1982-08-07

Family

ID=11800614

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1226881A Pending JPS57127395A (en) 1981-01-29 1981-01-29 Channel memory switching system

Country Status (1)

Country Link
JP (1) JPS57127395A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5944192A (en) * 1982-09-06 1984-03-12 Fujitsu Ltd Address converting system of channel memory

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53132204A (en) * 1977-04-23 1978-11-17 Nec Corp Time sharing multiplex control system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53132204A (en) * 1977-04-23 1978-11-17 Nec Corp Time sharing multiplex control system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5944192A (en) * 1982-09-06 1984-03-12 Fujitsu Ltd Address converting system of channel memory
JPH0129353B2 (en) * 1982-09-06 1989-06-09 Fujitsu Ltd

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