JPS5712494A - Storage protecting system - Google Patents

Storage protecting system

Info

Publication number
JPS5712494A
JPS5712494A JP8396780A JP8396780A JPS5712494A JP S5712494 A JPS5712494 A JP S5712494A JP 8396780 A JP8396780 A JP 8396780A JP 8396780 A JP8396780 A JP 8396780A JP S5712494 A JPS5712494 A JP S5712494A
Authority
JP
Japan
Prior art keywords
page
mini
pkt
comparator
size
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8396780A
Other languages
Japanese (ja)
Inventor
Kazuo Tajiri
Shizuo Shiokawa
Yoshimi Fukumura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP8396780A priority Critical patent/JPS5712494A/en
Publication of JPS5712494A publication Critical patent/JPS5712494A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Storage Device Security (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

PURPOSE:To realize a fine protection of storage in a high speed to a region smaller than a page, by installing a buffer mechanism to store the information showing the size of a mini-page plus a buffer mechanism to store a protection key. CONSTITUTION:A mini-page size part obtained through a buffer mechanism 12 which stores the information showing the size of a mini-page is sent to an index bit train growing mechanism 24 of a buffer mechanism which stores a protection key with every mini-page. The mechanism 24 transmits the comparison suppression signal to a comparator 26 in case the mini-page received an access has the same size as a page. The PKT index bit train obtained through the mechanism 24 is sent to a PKT13. The index of the PKT is carried out with use of the PKT index bit train and the real page number sent from an address converting buffer 11. The PKT 13 extracts the corresponding key out of a series of protection keys and then sends it to the comparator 26. The operation of the comparator 26 is supperssed when the comparison suppression signal is transmitted from the mechanism 24, and thus the comparator 26 transmits no interruption signal to a signal line 34.
JP8396780A 1980-06-23 1980-06-23 Storage protecting system Pending JPS5712494A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8396780A JPS5712494A (en) 1980-06-23 1980-06-23 Storage protecting system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8396780A JPS5712494A (en) 1980-06-23 1980-06-23 Storage protecting system

Publications (1)

Publication Number Publication Date
JPS5712494A true JPS5712494A (en) 1982-01-22

Family

ID=13817311

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8396780A Pending JPS5712494A (en) 1980-06-23 1980-06-23 Storage protecting system

Country Status (1)

Country Link
JP (1) JPS5712494A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63289659A (en) * 1987-05-22 1988-11-28 Hitachi Ltd Storage device protecting system
EP0408070A2 (en) * 1989-07-14 1991-01-16 Hitachi, Ltd. Method for allocating real pages to virtual pages having different page sizes therefrom
EP0425771A2 (en) * 1989-11-03 1991-05-08 International Business Machines Corporation An efficient mechanism for providing fine grain storage protection intervals
JPH04320553A (en) * 1991-03-13 1992-11-11 Internatl Business Mach Corp <Ibm> Address converting mechanism

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63289659A (en) * 1987-05-22 1988-11-28 Hitachi Ltd Storage device protecting system
EP0408070A2 (en) * 1989-07-14 1991-01-16 Hitachi, Ltd. Method for allocating real pages to virtual pages having different page sizes therefrom
US5426752A (en) * 1989-07-14 1995-06-20 Hitachi, Ltd. Method for allocating real pages to virtual pages having different page sizes therefrom
EP0425771A2 (en) * 1989-11-03 1991-05-08 International Business Machines Corporation An efficient mechanism for providing fine grain storage protection intervals
EP0425771A3 (en) * 1989-11-03 1992-09-02 International Business Machines Corporation An efficient mechanism for providing fine grain storage protection intervals
JPH04320553A (en) * 1991-03-13 1992-11-11 Internatl Business Mach Corp <Ibm> Address converting mechanism

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