JPS5712493A - Parallel type sample holding circuit - Google Patents
Parallel type sample holding circuitInfo
- Publication number
- JPS5712493A JPS5712493A JP8587080A JP8587080A JPS5712493A JP S5712493 A JPS5712493 A JP S5712493A JP 8587080 A JP8587080 A JP 8587080A JP 8587080 A JP8587080 A JP 8587080A JP S5712493 A JPS5712493 A JP S5712493A
- Authority
- JP
- Japan
- Prior art keywords
- sample holding
- sampling
- circuit
- circuits
- speed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
- G11C27/02—Sample-and-hold arrangements
Landscapes
- Analogue/Digital Conversion (AREA)
Abstract
PURPOSE:To decrease the number of expensive high-speed sample holding circuits, by sampling an input snalog signal through a high-speed sample holding circuit and then sampling the analog signal through plural low-speed sample holding circuits. CONSTITUTION:An input analog signal ei is supplied to a sample holding circuit SH0 that performs a sampling with a sampling pulse train of a sampling period T0. This sampled snalog signal is supplied to, e.g. three sample holding circuits SH1-SH3 to be sampled more to be then applied to A/D converters ADC1-ADC3. For the sample pulse trains to be used by the circuits SH1-SH3, the sample pulse train used in the circuit SH0 is stepped down to a 1/3 frequency from the pulse train that is delayed by an extent longer than the sampling time of the circuit SH0, and furthermore the time is shifted by the period T0. In such way, the circuits SH1-SH3 have the process capacity of a speed much lower than that of the circuit SH0.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55085870A JPS6047677B2 (en) | 1980-06-26 | 1980-06-26 | Parallel sample and hold circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55085870A JPS6047677B2 (en) | 1980-06-26 | 1980-06-26 | Parallel sample and hold circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5712493A true JPS5712493A (en) | 1982-01-22 |
JPS6047677B2 JPS6047677B2 (en) | 1985-10-23 |
Family
ID=13870927
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55085870A Expired JPS6047677B2 (en) | 1980-06-26 | 1980-06-26 | Parallel sample and hold circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6047677B2 (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58186216A (en) * | 1982-04-23 | 1983-10-31 | Nec Corp | High speed comparator circuit |
JPS619900A (en) * | 1984-06-25 | 1986-01-17 | Nippon Gakki Seizo Kk | Sample hold circuit |
JPS61261894A (en) * | 1985-05-15 | 1986-11-19 | Iwatsu Electric Co Ltd | Sample holding device |
US4859951A (en) * | 1986-10-22 | 1989-08-22 | British Telecommunications | Detecting faults in transmission lines employing an echo cancellation signal |
JPH02143845U (en) * | 1989-05-10 | 1990-12-06 | ||
US6590616B1 (en) | 1997-05-27 | 2003-07-08 | Seiko Epson Corporation | Image processor and integrated circuit for the same |
-
1980
- 1980-06-26 JP JP55085870A patent/JPS6047677B2/en not_active Expired
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58186216A (en) * | 1982-04-23 | 1983-10-31 | Nec Corp | High speed comparator circuit |
JPH0231893B2 (en) * | 1982-04-23 | 1990-07-17 | Nippon Electric Co | |
JPS619900A (en) * | 1984-06-25 | 1986-01-17 | Nippon Gakki Seizo Kk | Sample hold circuit |
JPS61261894A (en) * | 1985-05-15 | 1986-11-19 | Iwatsu Electric Co Ltd | Sample holding device |
US4859951A (en) * | 1986-10-22 | 1989-08-22 | British Telecommunications | Detecting faults in transmission lines employing an echo cancellation signal |
JPH02143845U (en) * | 1989-05-10 | 1990-12-06 | ||
US6590616B1 (en) | 1997-05-27 | 2003-07-08 | Seiko Epson Corporation | Image processor and integrated circuit for the same |
Also Published As
Publication number | Publication date |
---|---|
JPS6047677B2 (en) | 1985-10-23 |
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