JPS57123597A - Cmos type mask rom - Google Patents

Cmos type mask rom

Info

Publication number
JPS57123597A
JPS57123597A JP714981A JP714981A JPS57123597A JP S57123597 A JPS57123597 A JP S57123597A JP 714981 A JP714981 A JP 714981A JP 714981 A JP714981 A JP 714981A JP S57123597 A JPS57123597 A JP S57123597A
Authority
JP
Japan
Prior art keywords
trs
type
mask rom
gates
series
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP714981A
Other languages
Japanese (ja)
Other versions
JPS6037997B2 (en
Inventor
Tsuneo Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP56007149A priority Critical patent/JPS6037997B2/en
Publication of JPS57123597A publication Critical patent/JPS57123597A/en
Publication of JPS6037997B2 publication Critical patent/JPS6037997B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
    • G11C17/10—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
    • G11C17/12—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices

Landscapes

  • Static Random-Access Memory (AREA)
  • Read Only Memory (AREA)

Abstract

PURPOSE:To obtain an easily manufactured mask ROM through which no standby current flows, by using desired enhancement and depletion type transistors (TR) in combination as parallel and series P and N type TRs of a decoder for selecting memory chips of N type TRs. CONSTITUTION:A decoding circuit for an N type TR memory chip selecting signal CS consists of series P type TRs 207-210 between a power source and selection lines and parallel-corrected N type TRs 211-214, etc., between the selection lines and earth, and the corresponding TRs 207-210, and 211-214 are driven by external chip selection signals CS10 and CS20 and signals CS10 and CS20 passed through inverters 203 and 204. When boron, etc., is injected into the gates of the TRs 207-214 to increase threshold voltages, enhancement and depletion type TRs are combined in accordance with a mask and since gates, etc., are not used, the need for a standby current is eliminated, thereby obtaining an easily-manufacture mask ROM which has low power consumption and simple constitution.
JP56007149A 1981-01-22 1981-01-22 CMOS type mask ROM Expired JPS6037997B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56007149A JPS6037997B2 (en) 1981-01-22 1981-01-22 CMOS type mask ROM

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56007149A JPS6037997B2 (en) 1981-01-22 1981-01-22 CMOS type mask ROM

Publications (2)

Publication Number Publication Date
JPS57123597A true JPS57123597A (en) 1982-08-02
JPS6037997B2 JPS6037997B2 (en) 1985-08-29

Family

ID=11658008

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56007149A Expired JPS6037997B2 (en) 1981-01-22 1981-01-22 CMOS type mask ROM

Country Status (1)

Country Link
JP (1) JPS6037997B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59189441A (en) * 1983-04-12 1984-10-27 Sanyo Electric Co Ltd Code detecting circuit
JPS59191648A (en) * 1983-04-14 1984-10-30 Sanyo Electric Co Ltd Code detecting circuit
JPS613391A (en) * 1984-06-15 1986-01-09 Mitsubishi Electric Corp Input buffer circuit
JPS61104386A (en) * 1984-10-25 1986-05-22 アメリカン　マイクロシステムズ，インコーポレイテツド Writable cmos circuit for chip enable and output enable determined by user

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59189441A (en) * 1983-04-12 1984-10-27 Sanyo Electric Co Ltd Code detecting circuit
JPS59191648A (en) * 1983-04-14 1984-10-30 Sanyo Electric Co Ltd Code detecting circuit
JPS613391A (en) * 1984-06-15 1986-01-09 Mitsubishi Electric Corp Input buffer circuit
JPS61104386A (en) * 1984-10-25 1986-05-22 アメリカン　マイクロシステムズ，インコーポレイテツド Writable cmos circuit for chip enable and output enable determined by user

Also Published As

Publication number Publication date
JPS6037997B2 (en) 1985-08-29

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