JPS57117030A - Data transfer device - Google Patents
Data transfer deviceInfo
- Publication number
- JPS57117030A JPS57117030A JP56004268A JP426881A JPS57117030A JP S57117030 A JPS57117030 A JP S57117030A JP 56004268 A JP56004268 A JP 56004268A JP 426881 A JP426881 A JP 426881A JP S57117030 A JPS57117030 A JP S57117030A
- Authority
- JP
- Japan
- Prior art keywords
- intercepted
- receiver
- circuit
- central processing
- magnetic tape
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Human Computer Interaction (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Information Transfer Systems (AREA)
Abstract
PURPOSE:To intercept an information outputted to a magnetic tape device, and to transfer it to other system, without changing the software of a central processing equipment, by intercepting a protocol communicated between a central processing equipment and the magnetic tape device. CONSTITUTION:A confirmation device number sent to a central processing equipment from a magnetic tape device 2 is intercepted by a cable receiver CR2 and is compared 42 with a device number IOA. Subsequently, a write instruction code is intercepted by a receiver CR1, and is compared 41 with a write instruction code expected value WCMD. When the comparison results of the circuits 41 and 42 are in coincidence by a gate circuit G1, the output is provided to a gate circuit G2, and the next data is intercepted by the receiver CR1 and is stored in a memory 44. Also, a device state sent to the equipment 1 from the device 2 is intercepted by the receiver CR2, and is compared 43 with a device state code expected value DST. Subsequently, when an output of the circuit G1 coincides with an output of the circuit 43 by a gate circuit G2, a read-out controlling circuit 45 is started, a data is readout from the memory 44, and is transferred to other system.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56004268A JPS57117030A (en) | 1981-01-14 | 1981-01-14 | Data transfer device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56004268A JPS57117030A (en) | 1981-01-14 | 1981-01-14 | Data transfer device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57117030A true JPS57117030A (en) | 1982-07-21 |
Family
ID=11579788
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56004268A Pending JPS57117030A (en) | 1981-01-14 | 1981-01-14 | Data transfer device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57117030A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62102347A (en) * | 1985-10-29 | 1987-05-12 | Toshiba Corp | Input/output system |
-
1981
- 1981-01-14 JP JP56004268A patent/JPS57117030A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62102347A (en) * | 1985-10-29 | 1987-05-12 | Toshiba Corp | Input/output system |
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