JPS57113476A - Tlb controlling system - Google Patents

Tlb controlling system

Info

Publication number
JPS57113476A
JPS57113476A JP55188284A JP18828480A JPS57113476A JP S57113476 A JPS57113476 A JP S57113476A JP 55188284 A JP55188284 A JP 55188284A JP 18828480 A JP18828480 A JP 18828480A JP S57113476 A JPS57113476 A JP S57113476A
Authority
JP
Japan
Prior art keywords
tlb
page
entry
logical address
invalidated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55188284A
Other languages
Japanese (ja)
Inventor
Masahiro Kuriyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55188284A priority Critical patent/JPS57113476A/en
Publication of JPS57113476A publication Critical patent/JPS57113476A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

PURPOSE:To invalidate a translating index buffer (TLB) easily and quickly, by reading out a page number part of a logical address after page-out, and invalidating all the entry of the TLB coinciding with said page number part. CONSTITUTION:After a real page has been paged out, a page number PG of a logical address is read out from a logical address register LAR, and until it overflows the number of entry of TLB by an output of a counter CNT, the address is expanded. Subsequently, when a high-level ineffective bit INV is generated from an invalid bit generator BG until it exceeds the number PG, all the entry of TLB coinciding with the number PG is invalidated, and since a comparator, etc. are unnecessary, TLB is invalidated easily and quickly.
JP55188284A 1980-12-29 1980-12-29 Tlb controlling system Pending JPS57113476A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55188284A JPS57113476A (en) 1980-12-29 1980-12-29 Tlb controlling system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55188284A JPS57113476A (en) 1980-12-29 1980-12-29 Tlb controlling system

Publications (1)

Publication Number Publication Date
JPS57113476A true JPS57113476A (en) 1982-07-14

Family

ID=16220943

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55188284A Pending JPS57113476A (en) 1980-12-29 1980-12-29 Tlb controlling system

Country Status (1)

Country Link
JP (1) JPS57113476A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5577071A (en) * 1978-12-06 1980-06-10 Hitachi Ltd Address converter

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5577071A (en) * 1978-12-06 1980-06-10 Hitachi Ltd Address converter

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